feature article
Subscribe Now

Intel’s Stellarton Mixes CPU and FPGA

It’s a floor wax! It’s a dessert topping! Wait—it’s both!

Intel and Altera have made a deal to distribute a new chip that’s both an Intel processor and an Altera FPGA in one. In fact, it’s literally that: an Intel processor and an Altera FPGA in the same package. From the outside, it looks like one chip. Underneath, it’s actually two separate chips that are just cohabitating.

Intel used to call it by the code name Stellarton, but it’s now officially known as the Atom E600C processor family. It puts two separate silicon chips in the same package so that you can, uh, save a package. There’s no particular “synergy” between the two chips, in the sense that they don’t do anything together they couldn’t already do separately. That’s okay; nobody’s claiming breakthrough technology here. What the two companies are claiming is that you’ll save board space, time, and development headaches. Personally, I’ve got my doubts.

First, the technical details. The processor in question is the existing Atom E600 “Tunnel Creek” chip we talked about a few months ago (see Embedded Technology Journal, 9/14/2010). It’s a fairly speedy x86 processor with a lot of integrated I/O. The E600’s most notable features are probably its graphics controller, DDR2 memory interface, and PCI Express controller. It’s a pretty decent all-in-one chip if you like x86 processors and are willing to pay Intel prices. The downside of Tunnel Creek, as we mentioned at the time, is that it’s not really a single-chip chip. It requires two outboard clock- and interrupt-managers, and it usually requires a “south bridge” chip as well. So, in its native habitat, the E600 is more of a two- to four-chip proposition.

Over on the FPGA side, Altera is supplying its Arria II GX chip. This is Altera’s midrange FPGA fabric, with about 55,000 logic elements, some DSP blocks, and a half-dozen serial transceivers. In short, it’s a solid FPGA with good support.

Now, the bad news. The new E600C (the C is for “configurable”) is expensive. Pricing for the 1.0-GHz chip starts at $72 for the commercial-temperature part in 1,000-unit quantities. The 1.3-GHz chip is $97, and asking for the industrial-temp version adds about $8 to your bill. That compares to a starting price of just $29 for Tunnel Creek without the FPGA.

The old saying that two can live as cheaply as one apparently doesn’t apply to housing silicon. Welding that Altera FGPGA next door to the Intel processor doubles the price. Remember, the E600C is exactly the same chip as the E600. They’re not just similar; they really are the same silicon. So the bump in price is due entirely to the FPGA logic. That stuff ain’t cheap. Stated another way, both chips take equal credit for Stellarton’s high price.

That’s the economic bad news. There are also some technical quirks that suggest this marriage might have been a bit rushed. The Atom processor and the Arria FPGA communicate over a two-lane PCI Express bus. Fair enough—except that Arria doesn’t have a PCI Express interface. So your first order of business is to configure the FPGA to have one, using—get this—third-party IP. Altera doesn’t even provide an in-house PCI Express interface. The good news is, Intel does provide it with your E600C purchase, so at least you don’t have to go shopping for batteries on Christmas Day.

This embarrassing little kludge suggests that Altera and Intel are likely working on a next-generation Stellarton that includes a PCI Express interface on both chips. Or it could be some other type of interface; it doesn’t really matter as long as both chips support it equally well. It would be nice to have one that doesn’t eat into the user-configurable FPGA logic like the current implementation. And that doesn’t hijack the processor’s only PCI Express interface (so you can forget about using PCI Express in your application).

Support? That comes from Intel. Since the E600C is an Intel-branded part, it’s only right that Intel should provide all the support, including FPGA-related questions. Obviously, Altera is “involved” in helping Intel, as one Altera spokesman put it, but it’s all behind the scenes. As far as any customers need be concerned, it’s all Intel’s baby.

Intel’s PR trumpets this as the company’s first “configurable” processor, but that’s stretching things a bit. You can’t configure the processor at all. You can’t add or remove instructions, change buses, add function units, juggle registers, or any of the other options that actual configurable processors like Stretch, Synopsys, or Tensilica offer. You can’t even configure the peripherals or I/O interfaces. All Stellarton allows you do to is configure the FPGA living next door, which you could do all along. The E600C is configurable only in the sense that there’s an FPGA in the same package as the processor.

That’s okay. People have been using fixed processors with configurable FPGAs for a long time. It’s like chocolate and peanut butter: two things that go well together. Combing the two makes perfect sense… except that it often doesn’t. Altera, Xilinx, and other companies have tried (sometimes repeatedly) to combine FPGAs with CPUs and have often found the combination was unsuccessful. We’ve covered that topic before, so I won’t repeat all the arguments. The short version is, you have to like the processor and the FPGA if you’re going to like the combination. You also have to be sure you’re not going to want to upgrade one without the other. The E600C is obviously a package deal; you can’t change the processor without changing the FPGA, and vice versa.

If you’re happy with that combination, go ahead and give the E600C a try. 

8 thoughts on “Intel’s Stellarton Mixes CPU and FPGA”

  1. Pingback: the long game app
  2. Pingback: DMPK Studies
  3. Pingback: agen bola terbesar
  4. Pingback: bandar judi

Leave a Reply

featured blogs
Jul 13, 2020
As I write this in early July, we are looking at the calendar of events and trade shows for this year, and there are few survivors.  The Coronavirus pandemic of 2020 has seen almost all public events cancelled, from the Olympics to the Eurovision Song Contest.  Less...
Jul 10, 2020
[From the last episode: We looked at the convolution that defines the CNNs that are so popular for machine vision applications.] This week we'€™re going to do some more math, although, in this case, it won'€™t be as obscure and bizarre as convolution '€“ and yet we will...
Jul 10, 2020
I need a problem that lends itself to being solved using a genetic algorithm; also, one whose evolving results can be displayed on my 12 x 12 ping pong ball array....

Featured Video

Product Update: Advances in DesignWare Die-to-Die PHY IP

Sponsored by Synopsys

Hear the latest about Synopsys' DesignWare Die-to-Die PHY IP for SerDes-based 112G USR/XSR and parallel-based HBI interfaces. The IP, available in advanced FinFET processes, addresses the power, bandwidth, and latency requirements of high-performance computing SoCs targeting hyperscale data center, AI, and networking applications.

Click here for more information about DesignWare Die-to-Die PHY IP Solutions

Featured Paper

Improving Performance in High-Voltage Systems With Zero-Drift Hall-Effect Current Sensing

Sponsored by Texas Instruments

Learn how major industry trends are driving demands for isolated current sensing, and how new zero-drift Hall-effect current sensors can improve isolation and measurement drift while simplifying the design process.

Click here for more information

Featured Chalk Talk

The Future of Automotive Interconnects

Sponsored by Mouser Electronics and Molex

The modern automobile is practically a data center on wheels, with countless processors, controllers, sensors, and intelligent systems that need to communicate reliably. Choosing the right interconnect solutions is front and center in the design of these complex systems. In this episode of Chalk Talk, Amelia Dalton chats with Rudy Waluch of Molex about interconnect solutions for today’s automotive designs.

Click here for more information about about Molex Transportation Solutions