If you shout “FPGA” in a crowded theater full of engineers, some will barely flinch. They understand what an FPGA is and how to use it effectively. Some engineers, however, will run for the exits. They have heard of FPGAs, have never tried to mess with one, and are pretty frightened about what might happen if they tried.
This is bad.
Lattice Semiconductor just announced their new “Platform Manager” family of devices – which the company claims represents their third generation of mixed-signal products. FPGA fabric plays a significant role in these devices, but the company does not market them as “FPGAs.” Perhaps they fear the crush for the exits that might ensue if they use the F-word (or, the F-acronym, actually) in the wrong circles. Several vendors now, including Lattice, Actel, and QuickLogic, produce products that take substantial advantage of the capabilities of FPGA fabric – without marketing them as FPGAs. To the F-phobic, these are just regular-old parts – nothing to fear – that have some pretty impressive flexibility when it comes to bolting them into your application.
Platform Manager integrates a number of functions required on most boards all into one low-cost, small-form-factor device. The family contains two devices – the LPTM10-1247 and LPTM10-12107. The two devices differ primarily in the number of IOs – 47 and 107 respectively. Under the hood, both devices can monitor and trim up to 12 voltage rails – centralizing your power management. Each voltage rail has a programmable threshold, a high-accuracy differential comparator block (with an accuracy of 0.7%), programmable hardware timers for sequencing startup, a 48-macrocell CPLD, a 10-bit ADC, and a trim block for trimming power rails.
The other side of the device is really just a 640 LUT FPGA that can be used for a variety of system management functions, glue logic, and integration. Target functions for the FPGA block include reset distribution, start-up configuration control for (other) FPGAs and ASSPs, watchdog timers, and system bus interfaces for microcontrollers. Basically, you plop a Platform Manager down on your board instead of a conventional power manager device and you can integrate a lot of other system management functions on it for free.
If you haven’t used power management before, you’re in for some nice surprises. Each power rail in your design can be monitored for over-voltage or under-voltage conditions, and the power manager can respond to these cases in the way that makes sense for your design – shutting down parts of the circuit in an orderly fashion to avoid damage or unwanted conditions. With the capability to monitor and manage up to 12 rails, 0.7% accuracy, and a <65uS response time to fault conditions, you’ll be able to monitor and manage all of your power rails in most designs, and you will probably save a significant amount of board area, BOM cost, and complexity in the process.
By putting the generic FPGA and CPLD fabric in the design, Lattice has basically thrown an FPGA in for free. In many systems, this means you can buy one less FPGA as well – using the Platform Manager to handle the things normally allocated to a small, cheap FPGA. Of course, if you dip down into the fabric too far, you’ll find out it is really an FPGA. Don’t run screaming from the theater just yet, however. For most of the common system management functions, Lattice provides reference designs and IP to make it easy. Fault logging into non-volatile memory (think of a little airline-style black box for your device’s power system), closed-loop margining, and interfaces to I2C and SPI bus masters – are all available as free downloadable IP and reference designs.
You can pick up a development kit with an evaluation board for just $109 – less than a typical nice dinner for two. Lattice has worked to make the eval board experience an easy, pleasant, and quick one – with the goal of allowing you to see known-good hardware in five minutes, and to compile the provided source code to get to a known-good starting point in thirty minutes. You’d barely be done with the appetizer in your nice dinner out.
Interestingly, with products like Platform Manager, Lattice will find themselves competing, but not with the usual suspects – Xilinx, Altera, Actel, et. al. In fact, they may find these devices sitting on boards right alongside those of their traditional competitors. Instead, they’ll be competing with the likes of TI and Linear Technology – and going after a lot of sockets that the other kids on the FPGA playground are missing.
As time goes by, we expect we’ll be seeing more of these FPGA-in-sheep’s clothing products. It makes sense to create a high-performance mixed-signal device like this one – or even an ASSP, but to include enough FPGA fabric to make the device customizable to a wide range of applications. Particularly in this age of skyrocketing mask costs and NREs, semiconductor vendors could produce just one of these devices instead of a wide range of conventional parts, saving a bundle in development costs, and passing most of that right on to our BOM. We could design a wider variety of product variants – all with the same part, saving even more at the board/system level. In addition, most parts with FPGA fabric allow us to integrate several other “annoyance” functions from our board, saving us from adding a few more cheap points-of-failure that would drive up our BOM and manufacturing cost.
For those FPGA-fearing theater-runners, we are also likely to see more custom-made dumbed-down tools for taking advantage of the FPGA fabric on our standard parts. Instead of having to hike the mountain-of-a-learning-curve required to write HDL and get safely through synthesis and place-and-route, we’ll see more slick GUI interfaces that let you drag-and-drop the extra features you want on your device, and some nice virtual knobs to let you tune the parameters – safely away from the scary underlying reality of FPGA tools.
There is one piece of market magic in play here, though. When we say “semiconductor vendors could” above – we really mean “FPGA vendors”. Although just about anyone could throw some FPGA fabric down on their devices, only FPGA vendors currently have the considerable wherewithal to enable the end user to populate that FPGA fabric with something useful. The tools, IP, and support are where the magic is, and, at this moment in time, that’s the exclusive purview of the FPGA companies. That could be a major advantage for today’s FPGA companies (like Lattice) competing against the rest of the semiconductor world in the next few years.
