Finite impulse response (FIR) and fast Fourier transforms (FFTs) are two of the most common digital signal processing (DSP) functions implemented in FPGAs. In this webcast, you’ll learn how the FPGA industry’s first variable-precision DSP architecture, available in 28nm Altera^® FPGAs, is optimized for FIR and FFT implementation. 

Watch this webcast to find out how variable-precision DSP block features can:

• Efficiently implement FIR filters by incorporating a built-in pre-adder, co-efficient registers, and two levels of adder tree within the DSP block architecture
• Implement FFTs with only half of the silicon resources required by competing FPGAs by incorporating unique features for complex multiplication across various bit widths