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Magma Delivers Hierarchical Reference Flow for the Common Platform alliance’s 32/28-nm Low-Power Process Technology

SAN JOSE, Calif., Aug. 31, 2010 — Magma® Design Automation (Nasdaq: LAVA), today announced the availability of a proven hierarchical RTL-to-GDSII reference flow for the Common Platform™ alliance’s 32/28nm low-power process technology. This automated, comprehensive solution provides predictable results and reduces development costs for 2-million-instance and larger systems on chip (SoCs) that are manufactured at this advanced process node. 

The hierarchical reference design was implemented using Magma’s full RTL-to-GDSII flow and the ARM 32/28-nm LP process libraries; standard cells, memory compilers and GPIO. This successful design implementation demonstrates that the flow provides key capabilities required to build multi-Vdd low-power SoCs, validates tool and library interoperability and facilitates rapid user adoption through the inclusion of a sample design which can be accessed from Magma or the Common Platform alliance. 

This integrated hierarchical RTL-to-GDSII reference flow is based on Magma’s Talus® 1.1, Hydra™  and Talus Power Pro, providing a comprehensive low-power hierarchical solution. Talus 1.1 is an integrated RTL-to-GDSII implementation solution that performs timing optimization concurrently during routing –  rather than sequentially before and after place and route – providing faster overall design closure with better performance and predictability. Hydra is a hierarchical design planning solution for large systems on a chip (SoCs) and features out-of-the-box reference flows for enhanced ease of use and faster delivery of better floorplans. Talus Power Pro supports power optimization techniques required in low-power designs, including multiple voltage domains, which enable the optimal tradeoff between performance, area and power, and clock gating for dynamic power reduction. Talus Power Pro supports both the UPF and CPF standards for power intent. 

“The Common Platform alliance 32/28-nm process with Gate First High-k Metal Gate (HKMG) technology maximizes power efficiency and transistor scaling while minimizing die size and design complexity,” said Andy Brotman, vice president of Design Infrastructure at GLOBALFOUNDRIES. “By partnering with Magma to develop and deliver this reference flow, we enable our mutual customers to quickly take full advantage of leading software and advanced process technology to get the best results and time to market for their advanced designs.” 

“Magma software is specifically architected to address the complexity, size and power requirements of multimillion-gate ICs targeted at advanced nodes,” said Premal Buch, general manager of Magma’s Design Implementation Business Unit. “The Magma-Common Platform alliance reference flow will provide designers with additional confidence in their ability to successfully meet the power, performance and turnaround time goals of advanced ICs.” 

Magma will feature its reference flows for the Common Platform alliance 32/28-nm LP and 65-nm LPe processes at GLOBALFOUNDRIES’ Global Technology Conference on Sept. 1, 2010 in Santa Clara. For more information about GTC 2010, please visit: www.globalfoundries.com/gtc2010/. 

Availability

The reference flow is available upon request from IBM, Samsung Electronics, GLOBALFOUNDRIES and Magma. 

About the Common Platform

IBM, Samsung Electronics and GLOBALFOUNDRIES have forged a unique manufacturing collaboration, featuring 28-nm, 32-nm, 45-nm, 65-nm and 90-nm process technologies. By combining the expertise and research resources of all three companies and leveraging advances such as high-k metal gate technology, 193-nm immersion lithography and ultralow-k dielectrics, the Common Platform technology collaboration is able to accelerate the availability of leading-edge technology to foundry customers. The Common Platform model is supported by a comprehensive design-enablement ecosystem, enabling foundry customers to easily source their chip designs to multiple 300-mm foundries with minimal design work and with unprecedented flexibility and choice. 

About Magma

Magma’s electronic design automation (EDA) software provides the “Fastest Path to Silicon”™ and enables the world’s top chip companies to create high-performance integrated circuits (ICs) for cellular telephones, electronic games, WiFi, MP3 players, digital video, networking and other electronic applications. Magma products are used in IC implementation, analog/mixed-signal design, analysis, physical verification, circuit simulation and characterization. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magma’s stock trades on Nasdaq under the ticker symbol LAVA. Follow Magma on Twitter at www.Twitter.com/MagmaEDA and on Facebook at www.Facebook.com/Magma. Visit Magma Design Automation on the Web at www.magma-da.com.

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austriamicrosystems announces a low-power, 2.4 GHz multi-channel FSK transceiver with built-in star network manager

Unterpremstaetten, Austria (September 1, 2010) – austriamicrosystems (SIX: AMS), a leading global designer and manufacturer of high performance analog ICs, has announced the AS3940, the first fully integrated 2.4 GHz multi-channel FSK (frequency shift keying) transceiver with integrated link manager for reliable control of star networks (up to 8 clients). It features low power, high sensitivity (-100 dBm @ 250kbps, -92 dBm @ 2 Mbps), data rates from 250 kbps up to 2 Mbps, and integrates a digital RSSI (received signal strength indictor), real-time-clock (RTC) and programmable clock output, a Gaussian filter, PLL (phase locked loop) and loop filter.

The AS3940 is the first 2.4 GHz transceiver with built-in star network management protocol manager that is royalty-free and provides an easy to use protocol for self-management of all network functions. This high level of integration not only speeds system design, but also decreases the MCU’s workload and ensures robust data transfer (burst and streaming modes) and correct protocol handling. The AS3940 also offers excellent adjacent channel rejection and sensitivity (-100 dBm @ 250 kbps, -92 dBm @ 2Mbps) and unique features like battery voltage monitoring, adaptive channel switching, integrated TX/RX switch and 4 separate 256-bit user data buffers.

Other features include programmable output power, efficient power management and power-optimized wakeup modes, battery voltage detection, and adaptive channel switching/support of frequency hopping.  The performance and integrated functions of the AS3940 make it very well suited for a number of applications, including body area networks (health, fitness), wireless sensor networks, active smart labels, home & building automation, interactive remote controls, and data streaming.

“The introduction of the AS3940 2.4 GHz star network transceiver gives designers a device with a unique blend of high performance, low power, and ease of implementation”, stated Johnsy Varghese, austriamicrosystems’ Marketing Manager Wireless, “The AS3940 enables customers to be RF implementers instead of RF experts.  With its high performance and adaptive channel switching features the AS3940 creates a robust wireless system, even in dense WiFi environments.”

Price & Availability

The AS3940 costs less than $3.00 in 1000 piece quantities. Housed in a QFN-32 (5×5 mm) package, the AS3940 operates with a 2.2 V power supply over a temperature range of -40 to +85 °C.

Technical Support

A demo board is available to help evaluate the AS3940. For more information on the AS3940, visit www.austriamicrosystems.com/AS3940

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