feature article
Subscribe Now

Jasper Presenting “Formal Methods For Post-Silicon Debug” at S4D 2010 Conference September 15

MOUNTAIN VIEW, Calif. – Aug 19, 2010

WHAT: Jasper Design Automation will present a paper “Formal Methods and Jasper Tools in Post-Silicon Debug” at next month’s S4D 2010 Conference – http://bit.ly/aMwIXb.  The S4D 2010 Conference, Sept. 15-16 (co-located with the FDL 2010 Conference in Southampton, UK) is an annual forum for discussing research, and scientific and commercial development in the areas of system, software, SoC and silicon debug.

WHEN:  Wednesday, Sept 15, 1:30pm-3:00pm

WHERE:  Southampton University, School of Electronics, Highfield Campus, Southampton, UK

WHO:  Ziyad Hanna, Chief Architect and Vice President of Research, Jasper Design Automation, Mountain View, Calif.; and Adam Morawiec, ESCI and Jasper Design  Automation, Grenoble, France

About Jasper Design Automation

Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 150 successful chip deployments.  Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Asia. Visit www.jasper-da.com to reduce risks; increase design, verification and reuse productivity; and accelerate time to market.

Leave a Reply

featured blogs
May 6, 2026
Hollywood has struck gold with The Lord of the Rings and Dune'”so which sci-fi and fantasy books should filmmakers tackle next?...

featured paper

Want early design analysis without simulation?

Sponsored by Siemens Digital Industries Software

Traditional verification methods are failing today's complex IC designs, which require a proactive, early-stage analysis approach. A shift-left methodology addresses IP block integration challenges and the limitations of traditional simulation and ERC tools. Insight Analyzer detects hard-to-find leakage issues across power domains, enabling early analysis without full simulation. Identify inefficiencies earlier to reduce rework, improve reliability, and enhance power performance.

Click to read more!

featured chalk talk

What’s Driving Zephyr’s Momentum
In this episode of Chalk Talk, Brendon Slade from NXP and Amelia Dalton explore what Zephyr makes unique, how it compares to other RTOS options, and how its design philosophy enables developers to scale from simple prototypes to production-ready systems with confidence.
May 4, 2026
3,592 views