Norristown, Pa. August 2010 – LCR Electronics, a leading manufacturer of EMI filters and electronic control products as well as high-end enclosures for military, telecom and commercial applications, now offers OEMs two electronic timers in an open board style that provide a classic or modern look to a major cooking appliance.  The new EC113 and EC115 are inexpensive and easy for OEMs to install and are ideal for use in ovens, fryers, holding cabinets and cook and hold ovens found in the food service industry.

Utilizing an on-board potentiometer to replicate electromechanical timers, the compact, customizable EC113 can be easily placed anywhere on or in an appliance.  This one-size-fits-all digital electronic timer looks and works like a classic electro-mechanical timer complete with a large knob-pointer, yet it provides the reliability of a solid state digital device. One-hour and three-hour selectable time ranges are standard with custom ranges available. The piezo-buzzer or solenoid clacker sounds when the set time has expired.

As an added safety feature, if power is restored after an interruption while the timer is counting, the timer will automatically advance to zero and sound the buzzer. OEMs with global customers no longer need to stock an electro-mechanical timer for every combination of elapsed time, voltage and frequency since a single model of the EC113 can accept 120, 208 or 240 VAC power at 50 or 60 Hz. A new version that also accepts 24 VAC will be available soon.

For OEMs that prefer the modern digital look, LCR also offers the EC115 featuring a three digit, seven segment LED readout in any commonly available color including red, orange, yellow, green or blue. Two tactile user input types are also available – three soft keys or a small knob and a single soft key.  Like the EC113, when the timer reaches zero a piezo-buzzer sounds.  An off-board device like a solenoid clacker can also be used. Power input is 120, 208 or 240 VAC at 50 or 60 Hz.

All LCR electronic and motor control boards are standard in design; however, customization can be developed very cost-effectively.  The new timer control boards are easily combined with other electronic controls from LCR.

Pricing for EC113 starts in quantities of 1000 at $21.  Pricing for EC115 starts in quantities of 1000 at $34.  Delivery is 16 weeks ARO.

For more information, visit https://www.lcr-inc.com/electronic-controls.html or contact Carolyn McCarney, LCR Electronics, 9 South Forest Ave.; Norristown, Pa. 19401 Email: sales@lcr-inc.com; Web: http://www.lcr-inc.com; 1-800-527-4362.

MOUNTAIN VIEW, Calif. – August 11, 2010 – Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the Time Division Duplex (TDD) mode in its Long-term Evolution (LTE) Model Library for physical layer system simulation. The addition of the TDD mode to the proven LTE Model Library enables developers of semiconductors for LTE network equipment and devices to quickly and reliably extend their designs to support this important version of the 3rd Generation Partnership Project (3GPP) LTE standard.

The 3GPP LTE standard is the latest standard in mobile network technology. The primary advantages of LTE are high throughput, low latency, a simple architecture resulting in low operating costs, and support for both TDD and Frequency Division Duplex (FDD). Synopsys’ LTE library includes models of the transmitter and the physical channel as defined in the 3GPP standard as well as functional models of ideal receivers that can serve as references, providing an end-to-end simulation chain for both uplink and downlink transmission and reception. By leveraging both FDD and TDD mode models from the LTE Model Library, designers can focus on the development of highly-optimised, multi-mode modems for the entire LTE standard.

“The use of behavioral models of Xilinx’s baseband IP together with the Synopsys LTE Model Library allows customers to assess the performance advantages of our IP within the context of a standards-compliant system,” said Mark Quartermain, baseband marketing manager at Xilinx. “Synopsys’ ability to deliver an end-to-end LTE physical layer model along with high performance simulators enables system architects to accelerate their algorithm design by relying on standard compliant reference models for the entire physical layer simulation chain.”

The LTE Model Library offers ready-to-use, standard compliant test benches and simulation scripts that cover the test scenarios as defined in the LTE standard document. Models and scripts adhere to release 8.9 of the 3GPP LTE standard and will be upgraded as the standard evolves. In addition, the reference models in the LTE Model Library have been optimised to take advantage of the stream-driven data flow technology in Synopsys’ SPW and System Studio tools, and are designed to provide a comprehensive and efficient development environment for advanced digital signal processing design.

“The complexity of the LTE standard requires simulating more than 100 billion test vectors to check for compliance, creating quite a verification challenge,” said Johannes Stahl, director of marketing for system-level design at Synopsys. “Our LTE models are highly optimised for simulation performance. Together with our advanced algorithm design tools, the new LTE Model Library helps base station and handset modem designers ensure their functional design meets the LTE standard in the shortest possible time.”

Availability

The TDD-enhanced LTE Model Library is available immediately for use in SPW. Support for System Studio will follow in Q3 2010. Existing licensees of the LTE Model Library will receive the TDD enhancement as a regular maintenance update.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.