feature article
Subscribe Now

Persistent Precision

Mentor Synthesis Makes Steady, Stealthy Progress

Probably the most under-lauded product in the FPGA landscape is Mentor Graphics’s Precision synthesis.  Precision has been around in various incarnations for the better part of a decade now, quietly turning HDL into FPGA-bound netlists around the world with little fanfare or controversy.  

You’ll just about never see Precision in public – it prefers to keep a low profile.  It mainly hangs out on large distributed networks in the worlds’ largest electronics companies, helping to turn their experiments, prototypes, and products into FPGA reality.  Precision’s loyal fans tend to keep to themselves – helping the shy, shade-wearing synthesis tool maintain its modest mode of operation and its traditional aura of mystery and intrigue.

Precision has an interesting history. If you go deep into the chronicles of FPGA synthesis technology, you’ll find its grandfather — Leonardo — which was a product of then start-up Exemplar Logic. Leonardo was the primary contender for the 1990s third-party FPGA synthesis championship, along with Synplicity’s Synplify.  Synplicity went public, and Exemplar was acquired by Mentor Graphics, taking the contest from the domain of startup-versus-startup to the arena of newly-minted-public-company versus confused-acquisition-of-large-diverse-EDA-company.  Newly-minted-public-company won.  Synplicity gained a massive market share advantage while Exemplar/Mentor tried in vain to figure out just what to do with the technology.

Eventually, however, Mentor got it sorted out, and Leonardo evolved into “Leonardo Spectrum” and then finally to “Precision”.  Counter to appearances, Precision never really went head-to-head with Synplify.  Synplicity marketed Synplify aggressively to the broad base of FPGA designers – ranging from “Fred-in-the-shed” low-budget startup companies and consultants through mid-sized systems houses.  Mentor, on the other hand, kept Precision on a tight leash – aiming instead at the “big 25” largest electronics companies that provide the lion’s share of the “big-3” EDA companies’ revenue.  Synplify was sold in the trenches to engineers who were trying to eek out the last few nanoseconds from the critical path so their FPGA-based PCI block would run at 33 MHz instead of 32.999.  Precision was sold on the golf course to CAD-group executives of mega-companies as part of complex, multi-million-dollar multi-year deals involving a wide spectrum of EDA tools – with Precision included in the mix much like the benzoic acid in soda pop.  You don’t make the purchase because it’s there — you may not even realize you have it, but it’s good that it was included by the supplier.  

Apparently, some of the engineers at some of those mega-companies started using the product eventually, and kinda’ liked it.  They must have started calling up Mentor’s support line, making suggestions and providing feedback, and first thing you know – Mentor had a real tool on its hands.  Over the ensuing several years, Mentor has slowly evolved and improved the tool – increasing the range of FPGA coverage, improving the quality of results, and improving the stability in the way that only years of real-world, real-project use can. 

Recently, Mentor has made some interesting improvements to the world’s quietest design tool – giving it some unique differentiators not found in any other product.  Following (apparently) the guidance of some of their military, aerospace, and medical customers, the company has added some impressive features for radiation-tolerant and high-reliability design.  

As many of you know first-hand, radiation is not particularly a good friend to logic design.  Those annoying neutrons flying around in space can slam into just the right part of your circuit – changing a randomly selected zero into a one, or vice versa.  If that memory element was part of a state register – your state machine just ended up in another state.  If it was part of your configuration logic, your circuit may now be connected in a different way than you intended.  As with any random phenomenon – the possibilities are almost endless.

There is only so much the FPGA companies can do to mitigate the effects of radiation on FPGAs.  They can scrub the configuration periodically and take other process precautions to reduce the likelihood of a single-event-upset (SEU) or single-event-transient (SET).  There are, however, a number of things you can do in your logic design to help, but doing so is a tricky proposition with most synthesis tools.  You can triplicate all your registers and add voting circuitry to create triple-module-redundancy (TMR), you can encode your state machines in a “safe” way so that a single-state bit flip won’t land you in too much trouble… you get the idea.  You can create lots of extra safety with lots of extra design work.

Precision can now automate most of that extra design work for you – automatically synthesizing the structures you need for solid, radiation-tolerant design.  The new product, called “Precision Rad-Tolerant” adds significant capability to the stock synthesis tool for high-rel design.  Mentor says the product was developed “in conjunction with NASA” – which is an over-worked marketing claim, considering it puts your product in with the likes of Tang, upside-down-writing pens, and memory-foam mattresses.  What Mentor SHOULD have explained is that the product was developed with advice from the likes of Melanie Berg of MEI Technologies, NASA/GSFC Radiation Effects and Analysis Group – one of the world’s leading black-belt samurai experts on mitigating radiation effects in logic design.  

With Precision Rad-Tolerant, you can dial-in your own level and type of mitigation – including TMR and safe state-machine synthesis as well as other proven strategies like replicating critical sequential and combinational logic paths.  Mentor’s tool is multi-vendor and multi-technology, supporting devices from Actel and XIlinx – the only two FPGA vendors to aggressively market to the mil-aero community.  

In addition to reliability-specific features like radiation mitigation, Mentor has recently added other capabilities to Precision — like low-power synthesis — that are very important to the space-bound electronics crowd.  With the ability to put lower-power, more radiation-tolerant FPGAs in orbit or at altitude, Precision now fills a high-value niche in the FPGA design space.

Mil/Aero designs aren’t the only ones that can benefit from radiation mitigation strategies, however.  Random effects like SEUs can occur (albeit much less frequently) at ground level as well.  Companies developing high-reliability FPGA-based systems with substantial uptime requirements frequently run into SEUs as limiting factors in time-between-failures of large systems like network switches, or in safety-critical systems like some medical devices.  Precision Rad-Tolerant may find some happy customers in those markets as well.

Of course, as we mentioned, Precision is pretty shy, so you may have a hard time getting Mentor to tell you about it.  Be persistent, though – the results could be worth your effort.

Leave a Reply

featured blogs
Dec 6, 2023
Optimizing a silicon chip at the system level is crucial in achieving peak performance, efficiency, and system reliability. As Moore's Law faces diminishing returns, simply transitioning to the latest process node no longer guarantees substantial power, performance, or c...
Dec 6, 2023
Explore standards development and functional safety requirements with Jyotika Athavale, IEEE senior member and Senior Director of Silicon Lifecycle Management.The post Q&A With Jyotika Athavale, IEEE Champion, on Advancing Standards Development Worldwide appeared first ...
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

Power and Performance Analysis of FIR Filters and FFTs on Intel Agilex® 7 FPGAs

Sponsored by Intel

Learn about the Future of Intel Programmable Solutions Group at intel.com/leap. The power and performance efficiency of digital signal processing (DSP) workloads play a significant role in the evolution of modern-day technology. Compare benchmarks of finite impulse response (FIR) filters and fast Fourier transform (FFT) designs on Intel Agilex® 7 FPGAs to publicly available results from AMD’s Versal* FPGAs and artificial intelligence engines.

Read more

featured chalk talk

Package Evolution for MOSFETs and Diodes
Sponsored by Mouser Electronics and Vishay
A limiting factor for both MOSFETs and diodes is power dissipation per unit area and your choice of packaging can make a big difference in power dissipation. In this episode of Chalk Talk, Amelia Dalton and Brian Zachrel from Vishay investigate how package evolution has led to new advancements in diodes and MOSFETs including minimizing package resistance, increasing power density, and more! They also explore the benefits of using Vishay’s small and efficient PowerPAK® and eSMP® packages and the migration path you will need to keep in mind when using these solutions in your next design.
Jul 10, 2023
17,654 views