feature article
Subscribe Now

Imperas Releases Fast Models of PowerPC Processors Through Open Virtual Platforms (OVP) Initiative

THAME, United Kingdom, June 8, 2010 – Imperas, which through the Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has become the de facto source for instruction accurate processor modeling and simulation, today announced the release of fast models of PowerPC processors.  These models work with the OVP simulator, OVPsim, where they have shown exceptionally fast performance reaching over one thousand million instructions per second (MIPS).  The models are free and available as open source from the OVP website.

The addition of the models of the PowerPC cores brings OVP to nearly 50 different models of processor cores, all running at very high speed, and all working with both the OVP and Imperas simulators.  All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers to have a development environment available early to accelerate the software development cycle.  Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.  In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms, such as OS and CPU-aware tracing, profiling  code analysis, and multicore debug.

 “The Power Architecture is an important embedded processor family,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative.  “Users have been asking for fast models of the PowerPC processor cores, and we’re now able to deliver these models, open source and free, through Open Virtual Platforms.  This is just a continuation of the momentum in the OVP initiative.”

About Imperas (www.Imperas.com)

For more information about Imperas, please go to the Imperas website.

About the Open Virtual Platforms Initiative (www.OVPworld.org)

For more information about OVP, please go to the About OVP page on the OVP website. Detailed
quotations regarding OVP are available from http://www.ovpworld.org/newsblog/?p=42. Fast Instruction Accurate models are available from the OVP website for MIPS, ARM, Virage ARC, NEC v850, Power Architecture, OpenCores, SPARC and other processor families.

Leave a Reply

featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....

featured paper

Quickly and accurately identify inter-domain leakage issues in IC designs

Sponsored by Siemens Digital Industries Software

Power domain leakage is a major IC reliability issue, often missed by traditional tools. This white paper describes challenges of identifying leakage, types of false results, and presents Siemens EDA’s Insight Analyzer. The tool proactively finds true leakage paths, filters out false positives, and helps circuit designers quickly fix risks—enabling more robust, reliable chip designs. With detailed, context-aware analysis, designers save time and improve silicon quality.

Click to read more

featured chalk talk

Analog Output, Isolated Current, & Voltage Sensing Using Isolation Amplifiers
Sponsored by Mouser Electronics and Vishay
In this episode of Chalk Talk, Simon Goodwin from Vishay and Amelia Dalton chat about analog output, and isolated current and voltage sensing using isolation amplifiers. Simon and Amelia also explore the fundamental principles of current and voltage sensing and the variety of voltage and current sensing solutions offered by Vishay that can get your next design up and running in no time.
Apr 27, 2026
7,097 views