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MIPS Technologies Simplifies Android™ Application Development with Tools for the MIPS® Architecture

SUNNYVALE, Calif. – March 5, 2010 – MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for home entertainment, communications, networking and portable multimedia markets, today announced availability of advanced debug and development tools that simplify Android™ application development. These tools are free-of-charge through the Android on MIPS community. MIPS Technologies is making available the QEMU open source emulator, and through its partnership with Viosoft® Corporation, offering industry-leading Arriba development tools for QEMU to make development even easier. MIPS Technologies has also enhanced the Android Native Development Kit (NDK) for the MIPS® architecture to include a compiler and a rich graphical user interface (GUI) that streamlines the entire build process to a simple point-and-click for fast native development.

“Android development is gaining increasing popularity among MIPS developers. We already have more than 3,000 members of the Android on MIPS community, with upwards of 40 new registrants each day,” said Art Swift, vice president of marketing, MIPS Technologies. “MIPS Technologies is leading the industry not only in bringing Android to a broad range of consumer devices, but also in making development fast and easy. The tools that MIPS Technologies offers for Android development go far beyond solutions for other architectures, driving application development and growing the ecosystem around Android on MIPS.”

QEMU offers a virtualized emulation platform to speed development of Android applications on the MIPS architecture. The fully-integrated set of Arriba development tools for QEMU support native and Java development, and provide unprecedented visibility into code development. Tools include the time-tested Arriba Linux debug and profiling technologies and a comprehensive set of plug-in modules that offer valuable insight into the Android software stack, including the Android System Level Event Analyzer.

With the Android NDK for the MIPS architecture, developers can use native libraries with Android applications—allowing these applications to access existing software libraries supported for devices such as set-top boxes, digital TVs and consumer electronics. In addition, developers of performance-intensive applications such as gaming can create optimized code to deliver an enhanced user experience. One of the key improvements to the Android NDK – unavailable on other CPU architectures – is a rich and simplified GUI environment for the building of native Android applications that would otherwise be a manually-driven and cumbersome process.

Pricing and Availability

QEMU and the Android NDK for the MIPS architecture are available now, and the Arriba tools for QEMU will be available this month. All components are free-of-charge. To access the tools, visit www.mips.com/android for a direct link to the Android on MIPS community.

About Android on MIPS

Leveraging its leadership position in the digital home, MIPS Technologies is spearheading efforts to make Android a reality for a wide range of consumer electronic devices. With Android and the dynamic open source development community around it, developers can easily and quickly create new applications, and OEMs can leverage a fast-growing set of applications for their devices. The extensive MIPS ecosystem around Android enables OEMs to quickly optimize Android for their specific platforms and debug their solutions across the entire software stack. For more information about the Android platform and MIPS Technologies, or to access the full source code for MIPS Technologies’ port of Android to the MIPS32® architecture, including a reference binary and documentation, please visitwww.mips.com/android or email android@mips.com.

About MIPS Technologies, Inc.

MIPS Technologies, Inc. (Nasdaq: MIPS) is a leading provider of industry-standard processor architectures and cores that power some of the world’s most popular products for the home entertainment, communications, networking and portable multimedia markets. These include broadband devices from Linksys, DTVs and digital consumer devices from Sony, DVD recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco, 32-bit microcontrollers from Microchip Technology and laser printers from Hewlett-Packard. Founded in 1998, MIPS Technologies is headquartered in Sunnyvale, California, with offices worldwide. For more information, contact (408) 530-5000 or visit www.mips.com.

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Forte Design Systems Ships Latest Version of CellMath Designer

SAN JOSE, CALIF. — March 5, 2010 — Forte Design Systems, a leading provider of SystemC high-level synthesis, datapath synthesis and intellectual property (IP), announced it is shipping the latest version of CellMath Designer™ datapath synthesis and Cellmath IP software. The CellMath family allows register transfer level (RTL) designers to reduce area, improve performance and lower power consumption for their existing datapath-intensive design blocks.

“We’re seeing strong demand to reduce power and area, and create more competitive designs in virtually all market segments,” says Brett Cline, Forte’s vice president of marketing and sales. “Design teams that added CellMath Designer and CellMath IP to their existing logic synthesis or high-level synthesis design flow have been able to obtain optimal results quickly and at low cost.”

This version of CellMath Designer, the first release from Forte since it acquired Arithmatica in 2009, provides more automation to get users to optimal results with less effort. Other features include improved RTL code optimizations, a new bi-directional retiming algorithm and more scripting control, which mean that existing RTL designs can be used with no modifications.

For existing users, CellMath Designer’s multiplexor synthesis capability has been extended. This will provide more optimal results when optimizing across many levels of multiplexors, including recognizing complex pipeline enable signals formed from multiple levels of logic to improve ease of use and overall quality of results (QoR).

Improved formal verification flow for datapath designs

Traditionally, datapath blocks present unique challenges for formal verification tools because of the difficulty of comparing the original RTL input with the gate-level output after several complex transformations.

CellMath Designer’s unique approach to formal verification has been further extended to provide even more power to users. In this release, users have complete control over which parts of their design are described in RTL code and which at the gate-level, along with control over which carry-save outputs include final additions. This enables users to break verification problems into a chain of simpler/smaller steps that formal verification software can manage. With these new features, unresolved verification tasks can be turned from “inconclusive” to “equivalent.”

CellMath IP

CellMath Designer utilizes optimal, mathematically designed arithmetic operators and functions to improve overall quality of results in datapath-dominated designs. Together with CellMath Designer’s datapath synthesis capabilities, designers find that utilizing CellMath IP operators improves overall QoR, especially power, on existing RTL designs.

CellMath IP includes patented arithmetic architectures for floating-point, fixed-point and integer-based designs, and is being used in millions of leading-edge devices around the world.

Availability and Pricing

The latest version of CellMath Designer is shipping now. U.S. pricing starts at $120,000 for a one-year, time-based license.

About Forte Design Systems

Forte Design Systems is a leading provider of software products that enable design at a higher level of abstraction and improve design results. Its innovative synthesis technologies and intellectual property offerings allow design teams creating complex electronic chips and systems to reduce their overall design and verification time. More than half of the top 20 worldwide semiconductor companies use Forte’s products in production today for ASIC, SoC and FPGA design. Forte is headquartered in San Jose, Calif., with additional offices in England, Japan, Korea and the United States. For more information, visit www.ForteDS.com.

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