MOUNTAIN VIEW, Calif., March 3 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced important new capabilities in its System Studio C/C++ model-based analysis and simulation environment, further enhancing algorithm developer efficiency. System Studio now offers matrix and vector data-type support, which significantly reduces the coding and debugging effort necessary to author signal processing simulation models. Furthermore, System Studio addresses the need for faster simulation runs by integrating highly efficient parallelized matrix and vector function libraries optimized for multicore systems. These function libraries speed up simulation performance by up to eight times (8x).

System Studio’s C/C++ model-based analysis and simulation environment is widely deployed for the design of complex digital signal processing algorithms, including wireless, wireline and multimedia applications. Advanced signal processing standards are defined using matrix and vector notations. Examples range from describing simple filter operations to complex multi-antenna MIMO systems such as LTE or WiMAX. Availability of type-generic matrix and vector data types, plus dedicated functions and operators, significantly increases designer efficiency when authoring a simulation model of these standards. This efficiency is achieved by reducing the necessary number of lines of code by 10 to 100x compared to describing it with generic ANSI-C data types. At the same time, the complexity of these standards requires the highest simulation performance, as unaccelerated single simulation runs easily take hours or even days to complete. System Studio customers already benefit from highly optimized simulation performance through a combination of C/C++ based modeling and advanced compiled simulation techniques. The new multicore support for matrix and vector functions results in further simulation performance improvements up to 8x.

“System Studio allows us to both create models rapidly and simulate quickly to verify standard compliance,” said Graham Freeland, chief software engineer at Steepest Ascent, which provides mobile and wireless simulation libraries, professional consulting, and embedded communication systems design. “When developing our LTE physical layer model library for System Studio, we were able to use matrix and vector data types to rapidly transfer the specification into an executable model. The combination of extremely high simulation performance and standards-compliant simulation models enables us to significantly reduce time-to-results.”

“System Studio customers are involved in complex, leading-edge signal-processing designs. For them, time-to-results from system specification all the way to a bit-true reference model is of paramount importance,” said Markus Willems, senior product marketing manager for system-level solutions at Synopsys. “The availability of matrix and vector data types, operators, and functions benefits System Studio customers in three distinct ways: enhancing designers’ efficiency when authoring a model, providing the highest simulation performance, and enabling efficient integration of algorithmic models into hardware and software verification flows.”

The new matrix and vector data types, operators and functions are accompanied by a rich model library, delivered as part of System Studio at no extra cost. The model library includes performance-optimized implementations of widely used functions such as linear algebra operations, matrix multiplication, FFT, singular value decomposition and eigenvalue computation. Also, 2D and 3D visualization allows intuitive representation of matrix data.

Availability

System Studio featuring multicore matrix and vector data-type support is available immediately; existing licensees receive it as a regular maintenance update. For more information go to http://www.synopsys.com/systemstudio.

About Synopsys

Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

HIGH WYCOMBE, UK – March 2, 2010 — Curtiss-Wright Controls Embedded Computing, a business group of Curtiss-Wright Controls and a leading designer and manufacturer of commercial off-the-shelf (COTS) VME, VPX, VXS, and CompactPCI products for the aerospace and defense (A&D) market, has announced the availability of a higher performance, faster version of its ADC510 FPGA Mezzanine Card (FMC/VITA 57) module. Now, featuring two enhanced Texas Instruments ADC devices, the ADC510 delivers sampling performance increased to 550MSPS with analog bandwidths >1.7GHz. Available in both air-cooled and conduction-cooled rugged versions, the ADC510 is aimed at DSP applications such as Signal Intelligence (SIGINT), Electronic Counter Measures (ECM), and Radar. The ADC510 makes it easier and faster for system developers to integrate FPGAs into their embedded system designs.

“Ideally suited to SDR and SigInt applications, the faster ADC510 illustrates Curtiss-Wright Control’s continued leadership in practical open standard rugged solutions such as FMC,” said Lynn Patterson, vice president and general manager Curtiss-Wright Controls Embedded Computing. “FMCs enable our customers to have access to new technology with simplified upgrades paths for future solutions which protects their investment.”

The ADC510 now supports two Texas Instruments ADS54RF63 ADC devices with each device supporting a sampling rate up to 550 MSPS and providing 12-bits of digital output. The ADC device interfaces are routed to the FMC connector to enable an FPGA on a baseboard to directly control and receive data. There is a choice of sample clock sources for the ADC510 including an onboard source that supports sampling rates of 300, 320, 400, and 500 MSPS as well as the ability to utilize an external sample clock. Input and output triggers are provided to enable multiple ADC510 modules to be synchronized to increase the number of input channels.

It complements Curtiss-Wright Controls’ growing family of high-speed ADC FMC cards, including the recently announced ADC512, FMC-520 and FMC-XCLK2 providing a complete ADC/DAC solution for DSP applications.

FMCs address the needs of FPGA centric I/O by enabling I/O devices that reside on an industry standard mezzanine card to be attached to, and directly controlled by, FPGAs that reside on a baseboard. The benefits of FMCs are a small footprint, reduced I/O bottlenecks, increased flexibility, and reduced cost by removing redundant interfaces. An FMC module is about half the size of a PMC mezzanine module. To maximize data throughput and minimize latency, the FMC connector has many pins that support high-speed signals for moving data between the FMC and an FPGA on the baseboard. FMCs are ideal for high speed analog I/O, digital I/O, fiber-optics, memory or even a DSP co-processor.

ADC510 Key Features:

• Dual Texas Instruments ADS5463 or ADS54RF63 12-bit analog to digital converters
• Onboard clock generator (300, 320, 400 or 500MSPS), external RF sample clock input.
• FMC/VITA 57 form factor
• Air- or conduction-cooled rugged versions

Software Support

HDL example code is available for the ADC510 for integration into the HDL development suite for Curtiss-Wright Controls’ FPGA baseboards. The ADC510 is provided with HDL example code to simplify and speed integration into the HDL development suite for integration with Curtiss-Wright Controls’ FPGA host boards.

About FMC (VITA 57)

FMC modules enable I/O devices that reside on an industry standard (VITA 57) mezzanine card to be attached to, and directly controlled by FPGAs that reside on a host board. About half the size of a PMC mezzanine module, FMCs provide a small footprint, reduced I/O bottlenecks, increased flexibility, and reduced cost through the elimination of redundant interfaces. To maximize data throughput and minimize latency, the FMC connector provides numerous I/O pins that support high-speed signals for moving data between the FMC and the FPGA.

Pricing for ADC510 starts at $5,000 US.  Availability is off-the-shelf.

About Curtiss-Wright Controls Embedded Computing

Curtiss-Wright Controls Embedded Computing is the industry’s most comprehensive and experienced single source for embedded solutions, ranging from Processing, Subsystems, Data Communication, DSP, and Video & Graphics to the most advanced board level components and fully integrated custom systems. The Embedded Computing group serves the defense, aerospace, commercial and industrial markets and is part of Curtiss-Wright Controls Inc. For more information about Curtiss-Wright Controls Embedded Computing, visit www.cwcembedded.com.

About Curtiss-Wright Controls, Inc.

Headquartered in Charlotte, N.C., Curtiss-Wright Controls is the motion control segment of Curtiss-Wright Corporation (NYSE: CW). With manufacturing facilities around the world, Curtiss-Wright Controls is a leading technology-based organization providing niche motion control products, subsystems and services internationally for the aerospace and defense markets. For more information, visitwww.cwcontrols.com.