This week, Altera announced their next-generation low-cost FPGA family, Cyclone IV.  The new family has more capacity and lower power consumption, and, for the first time, it is available with high-speed serial IO.

[NOTE:  THIS ARTICLE WILL BE CLOSED-CAPTIONED FOR FPGA GEEKS.  IF YOU DON’T KNOW WHAT a “LUT” IS OR WHY “SYSTEM GATES” ARE FICTION, IGNORE THESE SUBTITLES AND JUST READ THE MAIN ARTICLE.]

Cyclone IV represents Altera’s latest volley in the low-cost FPGA wars.  Low-cost FPGAs have been the most competitive segment for the past several years, with Altera, Xilinx, Lattice, and Actel all fielding competent families and with the capability-per-cost of the devices out-pacing Moore’s Law by a decent margin.  Devices labeled “low-cost” today could compete favorably in many ways with the much more expensive “high-end” FPGA families from just a few years ago.

[IN FACT, A CYCLONE IV DEVICE HAS UP TO 150K LOGIC ELEMENTS, 360 MULTIPLIERS, 6.5Mb RAM, AND 8×3.125-Gbps TRANSCEIVERS.  STRATIX II GX HAD UP TO 130K LOGIC ELEMENTS, 252 MULTIPLIERS, 6.7 Mb RAM, and 20×6.375 Gpbs TRANSCEIVERS.  PRETTY COMPARABLE. CYCLONE IV WOULD WIN ON LOGIC DENSITY AND MULTIPLIERS, STRATIX II WOULD WIN ON TRANSCEIVERS.]

For the current round of the battle – the issue seems to be high-speed serial I/O (SerDes).  Previously, only the much more expensive high-end FPGA families like Altera’s Stratix and Xilinx’s Virtex included high-speed serial – and even then, only if you paid a premium for the very most sophisticated devices.  Then, a couple of years ago, Lattice came along and spoiled that game by introducing a low-cost family with SerDes.  Altera responded quickly, introducing a new mid-line FPGA family called Arria.  Xilinx lagged seriously behind in the low-cost-with-SerDes arena until recently when they introduced their new 45nm Spartan-6 low-cost family – with SerDes IO available.  

With the 45nm process node, Altera beat Xilinx to the punch on the high-end family by several months.  They launched Stratix IV and were well up the volume shipping curve by the time Xilinx announced its Virtex-6 devices.  Xilinx then leapfrogged at the low end, however, introducing their low-cost Spartan-6 at the same time.  Xilinx skipped the 65nm node with their low-cost offering, going straight from 90nm Spartan-3 to 45nm Spartan-6.

[XILINX TRIVIA QUESTION: WHAT DO VIRTEX-3, SPARTAN-4, and SPARTAN-5 ALL HAVE IN COMMON?  ANSWER: THEY NEVER EXISTED.]

Now, the pressure was on Altera to respond with a sequel to their 65nm Cyclone III family that would compete more favorably with Xilinx’s Spartan-6.  

This week – it’s here.    

Aimed at bandwidth-hungry, cost-sensitive applications like mobile video, voice, and data, and the emerging 3D display market, Altera’s new Cyclone IV drops the power consumption, adds SerDes (for the now almost-ubiquitous PCI Express), and shrinks the form factor down to as small as 11x11mm.  The new family is available in two flavors. Cyclone IV GX devices have up to 8 SerDes transceivers, and Cyclone IV E devices drop the  SerDes in favor of additional savings in cost and power.  

Cyclone IV GX offers seven devices ranging from 15K to 150K logic elements (LEs).  Cyclone IV E offers eight devices from 6K to 115K LEs.  By comparison, Cyclone III offered 8 devices ranging from 5K LEs to 120K LEs, and Cyclone III LS offered four devices from 70K to 200K LEs.  

[THAT’S ODD, ISN’T IT?  USUALLY A NEW FAMILY HAS A BIG DENSITY INCREASE, LIKE… DOUBLE.  WHAT’S UP WITH THAT?]

How do those densities compare with Xilinx’s Spartan-6? Spartan-6 ranges from about 5K to 185K Logic Cells, so Spartan-6 has the fabric density edge.  Spartan-6 has up to 4.8Mbits of RAM, so Cyclone IV wins that category, Spartan-6 brings 180 multipliers against Cyclone IV’s 360 so a big win for Cyclone IV in multipliers, and Spartan-6 has up to 8×3.125 Gbps transceivers plus a PCIe endpoint, so the SerDes is a near-wash.

[INTERESTING AGAIN, INDUSTRY GEEK-FANS.  THIS IS CLOSER TO PARITY THAN A NEW FAMILY USUALLY HAS – PARTICULARLY WHEN THE OTHER GUYS ANNOUNCED FIRST.  THE CUSTOMARY CONSOLATION PRIZE FOR THE ‘FIRST!’ CONTEST IS THAT THE SECOND COMPANY TO ANNOUNCE HAS FULL KNOWLEDGE OF THE FAMILY THEY’RE COMPETING WITH AND CAN FOLLOW WITH A HARD TRUMP.]

With the new Cyclone IV families, Altera is touting dramatic power reductions – “up to 25%” for Cyclone IV GX, and “up to 30%” for Cyclone IV E.  The devices are fabricated on TSMC’s low-power (LP) 60nm process, and, by allowing lower supply voltages, Altera has gotten static power for even the largest Cyclone IV E device down to 163 mw.  Altera already had a respectable suite of power reduction and estimation tools, so with the new families’ lower power consumption, a broad range of applications can benefit from the power savings and flexibility of low-cost FPGAs.

[SCREEEEEEECH!  WAIT, WHAT?  REWIND…  BACK ONE, TWO, THREE SENTENCES… THERE!  THE ONE ABOUT TSMC’S LP PROCESS.  60NM?!? HEY ALTERA, THAT’S TOTALLY CHEATING! NOW YOU’VE GONE AND MESSED UP OUR WHOLE, NICE, ORGANIZED, SANDBOX.  SEE, HERE ARE THE RULES:  ALTERA DOES THE ROMAN NUMERALS, AND XILINX DOES THE REGULAR ONES.  ON ANY GIVEN PROCESS NODE, XILINX’S NUMBERS ARE 2 BIGGER.  EACH COMPANY DOES A NEW GENERATION EVERY 2 YEARS IN SYNC WITH MOORE’S LAW.  THIS MEANS BY 2018, XILINX SHOULD BE AT VIRTEX/SPARTAN-10, AND ALTERA SHOULD BE AT STRATIX/CYCLONE 8, AND BOTH SHOULD BE ON SOMETHING LIKE 14NM PROCESSES.  THE DEVICES SHOULD BE BASICALLY FREE AND INFINITELY LARGE AND FAST, CONSUMING ZERO POWER.  WE WON’T USE ANY OTHER CHIPS, EVER]

Altera says the new families will begin volume shipments in 1Q 2010.  The smallest devices will start at $3 and $6 in 250K quantities. The three smallest devices will be supported in Altera’s Quartus II design software version 9.1, with the remaining ones supported in the subsequent Service Pack 1.  

[HEY, NORMAL ARTICLE VOICE, YOU INTERRUPTED.  OF COURSE THEY CAN START SHIPPING SOON – THEY USED THE SAME PROCESS AND THE SAME ARCHITECTURE – NO MOVING FROM LUT4 TO ALM, NO RE-TOOLING.  WE GEEKS ARE STILL SORE ABOUT THIS WHOLE 60NM VS 45NM SCAM!  THIS FAMILY SHOULD REALLY BE CALLED CYCLONE III GX, OR CYCLONE III.V OR…]

Put a sock in it subtitles!  What’s up with the all-shouting, all-caps, all-the-time rant?  Give the geekdom a rest.  We think the Cyclone IV families make a lot of sense for a wide variety of applications, and the power reductions and SerDes IO will help a lot of cost-sensitive, bandwidth-hungry systems make it to market faster.