For many of us, ordering the exact FPGA tools that we need to do our job has been frustrating at times:
“We’d like to start with some spring rolls, please.”
“Yes sir, and who are they for?”
“We’d like to share them. They come six to an order, right?”
“Yes sir, they do, but you may not share. Each person has to order their own.”
“Ah, well, (winks) I’ll have the six spring rolls, then. And SHE would like the Kung Pao Chicken.”
“Yes sir, and would you like the chicken with that? It’s $6 extra.”
“Chicken is an extra-cost item when you order Kung Pao Chicken?”
“Yes, the base-level Kung Pao includes just peanuts and sauce. Chicken is an upgrade.”
“OK, we’ll take the Kung Pao Chicken, then, with the chicken upgrade…and we’d like some rice with that.”
“Sorry, sir, rice is available only if you also purchase the Peking Duck, and that requires 24-hours notice.”
“Ahhh, I see. Well – just the Spring Rolls and upgraded Kung-Pao chicken, then, I guess.”
Many of you are laughing, and not with one of those “hey that’s a funny story” kind of happy laugh, but rather the “Ouch, that sounds just like the last time I tried to purchase FPGA tools for my company and couldn’t figure out how to get the ones I actually wanted” kind of insincere, forced, painful chuckle.
Xilinx, for their part, is trying to fix all that. Sure, we could write the whole normal article about the incremental, inertial, evolutionary changes that Xilinx has engineered into the latest release of their design tool suite, and it would be interesting and informative, but that would be missing the big picture. Along with the reduced memory footprints, the improved GUIs, the faster runtimes, and the improved optimization results, Xilinx has re-engineered the way they think about their customers and how people use FPGA design tools.
The company took a look at the types of engineers doing FPGA design and created a set of model “personas.” Each persona represents a group of typical FPGA designers with a common set of skills, methods, and objectives. For example, someone who matches the “DSP” persona is typically an engineer skilled in signal processing algorithm design, probably proficient in tools like MATLAB, most likely skilled in writing highly-optimized C or C++ code to run on high-performance DSP cores, and not necessarily an expert in areas like logic design, HDL, or hardware datapath architectures.
A “Logic Designer” might be a person with black-belt VHDL and Verilog skills, an ace at tuning logic synthesis and place-and-route for the best Fmax, and a master at navigating the waters of hard-IP blocks – finding the perfect macro to improve the speed and power consumption of a complex logic design but without much expertise in the subtleties of getting Linux to boot on an embedded soft-core processor.
The personae that Xilinx distilled during the planning of ISE Design Suite 11.1 include “Logic Designer,” “Embedded System Hardware Engineer,” “Embedded Software Developer,” “DSP Algorithm Developer System Engineer,” and “System Integrator.” Corresponding to those, ISE Design Suite 11.1 is offered in four “domain-specific” configurations: Logic Edition, Embedded Edition, DSP Edition, and System Edition – plus a new standalone software development kit that allows embedded software developers to get the tools they need without also having to download and install umpteen gigabytes of hardware-specific tools like synthesis and place-and-route. These Editions provide a much more sensible way for engineers to order a set of design tools that includes the features they need in order to do their particular job — without having to also buy the Peking Duck.
These Editions would certainly have been a huge improvement on the “old school” packaging of Xilinx tools, but the company is taking the concept one step farther than that with what they call “Targeted Design Platforms.” With the recently-announced Virtex-6 and Spartan-6 families, the company is building almost-application-specific platforms that include things like IP blocks, reference designs, base development boards, and plug-in daughter cards – all of which can get you to the 80% done mark before you even start on your design (if, of course, you happen to be designing one of the targeted applications).
For programmable logic vendors, finding the right target application is both an art and a science. For example, if they produce an application that is 100% designed (you just drop the chip on the board, blast in a bitstream, and go), they leave behind most of the benefit of using programmable logic. If your design can be completed by a third-party like Xilinx and their partners, you probably don’t need the flexibility of an FPGA, and an ASSP or standard part could solve your problem better. If, on the other hand, they just give you generic FPGA design tools and a development board, the learning and development curve are so big that many potential design teams are frightened off by the FPGA-ness of the project. The trick is to find an application that can be almost completed as part of the platform, but where the 10-20% that’s left is the exact part where you can add your product differentiation, adapt to changing or protocols or standards, or mate your design to a wide variety of situations and interfaces where a pre-designed part wouldn’t fit.
Targeted Design Platforms takes this concept beyond the usual IP and reference design package, as Xilinx has also re-thought their development board strategy. The company is migrating toward a set of development boards that standardize the base board and allow domain-specific additions through plug-in modules based on FPGA Mezzanine Card (FMC) standards. This should simplify the development-board decision process considerably, coming from today’s situation where a plethora of sometimes-incompatible board offerings may require teams to use multiple different boards to complete and debug their design successfully.
Xilinx’s Base Targeted Design Platform includes all the “normal” FPGA design tools such as ISE Foundation (synthesis, place-and-route, user interface, core generator), ISE Simulator, PlanAhead (floorplanning and analysis tool), ChipScope Pro (embedded logic analyzer), and Serial I/O Toolkit (high-speed serial interface analysis), plus all the bitstream generation and programming stuff you need to put your design into hardware.
The other design platforms build on these base capabilities with domain-specific tools and features. The DSP Edition adds System Generator for DSP (a tool that moves your design from the MATLAB/Simulink environment into the FPGA design environment), AccelDSP synthesis (A DSP-specific synthesis tool), and DSP-specific IP (you know – filters and stuff).
The Embedded Edition adds the Embedded Development Kit (EDK) with Platform Studio Design Suite (lets you stitch together an embedded system design by basically dragging and dropping processors, peripherals, busses, etc.) and Software Developer’s Kit (SDK), which includes all the software development and debugging tools (and which, as we mentioned earlier, is also now available separately), and embedded-specific IP such as the MicroBlaze soft-core embedded processor.
Finally, the System Edition just bundles the works together in one big package for people doing complex systems-on-chip with both processors and DSP algorithm acceleration.
Under the hood, Xilinx has been busy improving the specific tools as well. The company claims that dynamic power consumption, for example, is an average of 10% lower with this release, based on synthesis and place-and-route optimizations (this is for the same design, targeting the same chip, operating at the same frequency, synthesized from the same HDL). They are also claiming a 2x boost in tool performance (which we would categorize as up to a 50% reduction in run times, but your mileage will almost certainly vary). A new, industry-standard licensing system is now also in place, making software licensing options both simpler and more flexible – particularly for floating license configurations.
Overall, with this latest major release, Xilinx appears to be making life easier for both their customer and themselves. Simpler, more intuitive packaging means less time and effort on configuration, installation, and licensing issues, leaving more time for real design and real design support. Perhaps more importantly, by viewing the tool suite the same way many of their customers do, the company is likely positioned to make more useful enhancements in the future.