feature article
Subscribe Now

The End of Silicon Valley

A moment of silence, please, for Silicon Valley. Intel announced last week it would close its chip-manufacturing plant located near the company’s headquarters in Santa Clara – and with it, the very last chip fab anywhere in Silicon Valley.

The technology that gave its name to the Santa Clara valley, once called “the valley of heart’s delight” for no immediately obvious reason, has left for greener pastures. When I started working in electronics, Santa Clara still had fruit orchards in it. Chip plants alternated with cherry trees. Now there’s no silicon in Silicon Valley. (There’s still plenty of silicone jiggling around the valley, but that’s a different story entirely.)

The rise of Silicon Valley has been chronicled elsewhere, but the short version involves the happy confluence of universities, talent, and cheap land. Two of those three still exist in abundance in Santa Clara county (you guess which ones). A quick perusal of online real estate listings shows that modest houses anywhere near Intel Galactic Headquarters start at about $1 million for an aging fixer-upper.

But it’s not housing costs that drove the fabs away. It’s what’s under the soil, as in tectonic plates. As semiconductor technology became more advanced the fabs and foundries became exquisitely sensitive to dust, contamination, and vibration. The merest disruption could ruin a week’s worth of chip production, consigning several millions of dollars of silicon to the dumpster. That’s exactly the kind of plant you don’t want to build over an earthquake fault.

The awesome cost of a fab – and their occasionally awesome profitability – also meant chipmakers like Intel went looking for more favorable tax environments. Oregon, Arizona, New Mexico and states or even countries further afield offered lucrative incentives for locating fabs within their borders. Anywhere that land was cheap, flat, and geologically stable the local government could provide the rest: roads, clean water, an educated workforce, and deferred taxes. Silicon Valley was where chips were designed; Singapore, Ireland, and Idaho were where they were fabricated.

Perhaps coincidentally, Intel’s chairman of the board, Craig Barrett, announced his retirement the same week as the plant closing. The man who, along with Andy Grove and Gordon Moore, helped define Intel and drove its success may have felt the passing of this milestone more keenly than most. Throughout his tenure, Intel had always manufactured chips within sight of his corner office. If the fab goes, I go, he may have thought. It’s getting too late in the day for both of us.

And so this week we mark the retirement of two Silicon Valley landmarks that gave the area its flavor and its very name. Let’s all remember to explain to future generations how that name came about.

Leave a Reply

featured blogs
Jun 2, 2023
Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you'll find a community where employees share their perspectives and experiences. By providing a glimpse of their personal...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....
Jun 2, 2023
Explore the importance of big data analytics in the semiconductor manufacturing process, as chip designers pull insights from throughout the silicon lifecycle. The post Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics appeared first on New Hor...

featured video

Find Out How The Best Custom Design Tools Just Got Better

Sponsored by Cadence Design Systems

The analog design world we know is evolving. And so is Cadence Virtuoso technology. Learn how the best analog tools just got better to help you keep pace with your challenging design issues. The AI-powered Virtuoso Studio custom design solution provides innovative features, reimagined infrastructure for unrivaled productivity, generative AI for design migration, and new levels of integration that stretch beyond classic design boundaries.

Click here for more information

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Prognostic Health Management/Predictive Maintenance Solutions for Machines
Sponsored by Mouser Electronics and Advantech
Prognostic health management, also known as predictive maintenance, is a vital component of our industrial ecosystem. In this episode of Chalk Talk, Amelia Dalton chats with Eric Wang from Advantech about the roles that data acquisition, data processing and artificial intelligence play in prognostic health management, the challenges of building these types of systems, and what kind of predictive maintenance solution would be the best fit for your next design.
Aug 18, 2022
34,252 views