feature article
Subscribe Now

Low Power Processing

Actel Igloo Meets ARM Cortex M1

Last week, in “ARM and Altera – Why You Should Care,” we looked at the announcement of an Altera Cyclone III development kit for the ARM Cortex M1 soft-core processor.  We discussed ARM’s quiet conquest of the market for embedded computing with FPGAs and how the Cyclone III announcement moved the IP core from niche player to mainstream programmable logic platform.  This week, we discuss Actel’s announcement of a focus on handheld and portable applications.  As we discussed in our “Battery-Powered Proof” feature two weeks ago, FPGAs have not been long known as good citizens in battery-powered parts communities, and the idea of an FPGA playing a central role in a portable or handheld device is a new concept indeed.

In the world of portable devices, the requirements are vastly different from programmable logic’s traditional strengths.  Portables demand extremely low power, flexible power management capabilities, very small footprints, low cost (due to typically high volumes and therefore high BOM cost sensitivity), and high performance.  While the flexibility and time-to-market advantages of FPGAs can be enormous, poor performance in the previous categories has long been a substantial barrier to their adoption in portables.

Actel announced a new “Focus of Power and Portable” strategy this week, attempting to break the public perception on portable processing with FPGAs.  The centerpiece of this announcement is the unveiling of a version of the company’s ultra-low-power Igloo family with ARM’s new Cortex M1 FPGA-optimized processor core.  The availability of an embedded-computing-platform-class FPGA with power consumption and footprint specs such as Igloo’s are likely to spawn significant interest among designers of power-sensitive portable systems.  With the traditional road blocks removed, the compelling advantages of in-system reprogrammability, rapid design turnaround, and lack of NRE could win a bevy of sockets for the new family – especially given the perceived safety of designing an embedded system around an ARM-architecture processor. 

Actel has a unique and pleasantly simple strategy for licensing the ARM soft cores.  When you purchase an Actel device, you have the option to buy the “M1” version, which contains the licensing code required to unlock the ARM core.  By purchasing the device from Actel, the ARM licensing fee is already covered.  This arrangement means you don’t have to separately negotiate and acquire the ARM license (as is required with other FPGA vendors’ use of the ARM core).  This single source acquisition of silicon and IP license are likely to be welcomed, particularly by smaller companies with less legal infrastructure.

Also likely to be welcome by many in the portables space is the availability of the ARM processor.  While FPGAs are relative newcomers in many of the boards here, the ARM architectures, tools, and software IP have been around for awhile.  Additionally, the FPGA provides a perfect prototyping and early-production vehicle for those who plan to make an ASIC implementation later for high-volume cost reduction.  When that happens, the software from the Cortex M1 is upward compatible with the M3 (or any member of the Cortex family.) 

Actel is announcing availability of the M1AGL600 device – an ARM-enabled version of the 600,000-system-gate (13,842-Actel-tile) Igloo device.  In that device, a Cortex-M1 uses 33% of the FPGA fabric, so 2/3 of the device is left over for the rest of your system-on-chip.  The device includes 108Kbits of SRAM and 235 I/Os.  Actel plans to make additional Igloo devices available with the “M1” designation during 2008.

The forte of the Igloo family is power-efficient operation.  Since the devices are true flash-based FPGAs, they don’t have a mandatory configuration cycle on power-up.  Non-volatile FPGAs keep their configuration on power-down and therefore don’t require maintenance current just to hold their configuration.  The Cortex-M1 uses less than 24µA in static mode, less than 20µA quiescent in what Actel calls “Flash Freeze” mode (which can almost instantly cycle off the power on an operating device), and less than 3µA in sleep mode.  Actel points out that the ARM can be clocked more slowly if performance demands allow, further reducing active power, and that Vcc optimization can reduce power by more than 35% at 1.2V.

Actel’s announcement goes beyond the newly IP-enabled silicon, however.  They also hint at further announcements to come in specific solution areas like storage, displays, and control.  Following on the basic silicon and tool platforms, it would make sense to come along with domain-optimized development boards, reference designs, and IP offerings to really accelerate design in high-value application areas. 

In order to further validate and boost the offering, Actel is also simultaneously announcing three partner offerings in the storage space – all boasting Igloo (though not yet ARM-enabled Igloo) devices.  Arasan has a storage daughter card based on a Marvell PXA 300/310 for SD/MMC, MicroSD, and CE-ATA targeting Smart phones, GPS, and PDAs.  iWave Systems has a PDA development platform based on a Freescale i.MX27 for SD/MMC and CE-ATA targeting pocket computers, GPS, PDAs, and point-of-sale terminals.  PalmChip has a storage daughter card based on the Marvell PXA 270 for CE-ATA, SD/MMC, and CompactFlash targeting smartphones, GPS, and PDAs.  These boards and systems represent the second layer of the ecosystem for Igloo-based development of portable devices.  With the advent of the ARM-enabled members of the Igloo family, this initial partner portfolio is likely to expand dramatically.

Actel is estimating the market opportunity for programmable logic in portable applications such as consumer, industrial, medical, military, and automotive to be north of $500M by the year 2010.  If this estimate is in the ballpark, a piece of the programmable portable pie is certainly worth pursuing. The unique capabilities of Actel’s Igloo family, combined with the ARM’s ubiquity, make a formidable entry into that derby.

Leave a Reply

featured blogs
Oct 22, 2021
Voltus TM IC Power Integrity Solution is a power integrity and analysis signoff solution that is integrated with the full suite of design implementation and signoff tools of Cadence to deliver the... [[ Click on the title to access the full blog on the Cadence Community site...
Oct 21, 2021
We share AI chip design insights from AI Hardware Summit 2021, including wafer scale AI accelerator chips, high-bandwidth memory interfaces, and custom SoCs. The post 4 Futuristic Design Takeaways from the AI Hardware Summit 2021 appeared first on From Silicon To Software....
Oct 20, 2021
I've seen a lot of things in my time, but I don't think I was ready to see a robot that can walk, fly, ride a skateboard, and balance on a slackline....
Oct 4, 2021
The latest version of Intel® Quartus® Prime software version 21.3 has been released. It introduces many new intuitive features and improvements that make it easier to design with Intel® FPGAs, including the new Intel® Agilex'„¢ FPGAs. These new features and improvements...

featured video

Imagination Uses Cadence Digital Full Flow for GPU Development

Sponsored by Cadence Design Systems

Learn how Imagination Technologies uses the latest Cadence digital design and simulation solutions to deliver leading-edge GPU technology for automotive, mobile, and data center products.

Click here to learn more about Cadence’s digital design and signoff solutions

featured paper

How to Design with Maxim’s Latest Supervisors

Sponsored by Maxim Integrated (now part of Analog Devices)

As the technologies in MCUs, µPs, DSPs, and FPGAs move toward lower geometries and power, operational voltages become significantly low for these devices. Reducing the core voltage poses challenges in the use of high-accuracy power supply and voltage supervisors to avoid system failure. This application note discusses the critical parameters Maxim’s MAX16132–MAX16135 supervisor family and presents a reasonable approach in choosing the right reset threshold and hysteresis for voltage supervisor ICs.

Click to read more

featured chalk talk

Accelerating Physical Verification Productivity Part Two

Sponsored by Synopsys

Physical verification of IC designs at today’s advanced process nodes requires an immense amount of processing power. But, getting your design and verification tools to take full advantage of the compute resources available can be a challenge. In this episode of Chalk Talk, Amelia Dalton chats with Manoz Palaparthi of Synopsys about dramatically improving the performance of your physical verification process. 

Click here for more information about Physical Verification using IC Validator