In the good old days, people knew what a LUT was.
Why, when I was a design engineer, we taped out our design on glass – with real tape. There was none of this fancy new lithography. After FPGAs came out, we used to work out the LUT truth tables by hand, coding up Karnaugh maps to minimize our equations, doing De Morgan equivalents… Heck, kids these days with all their fancy IP blocks and algorithm compilers – they couldn’t cross-couple a NAND gate if their life depended on it. Spoiled, I tell ya’!
Back in the day, FPGA designers were a determined bunch. They had to be. They needed the special advantages of FPGA technology so badly that they would practically walk across hot coals to get the darn things to work. Today, however, designers have two things that those engineers did not – schedule pressure, and options. With market windows closing almost before they’ve opened, you’ve got to get your design out into the world fast enough to avoid getting a finger chopped off. You don’t have time to make a career learning the vagaries of one device or one technology. For any given electronic design problem, there are several compelling solutions competing for your socket, and you’ve got to pick one, use it, and move along without having to marry the technology.
FPGAs competing in new markets have to appeal to those spoiled new kids. FPGA vendors can’t wait around for designers to come up to speed on all the possible applications of every novel technology available to them. If vendors want their devices to play in that show, they have to propel them into the sockets with ease and conviction. They can’t afford to force FPGA neophytes to run a grueling gauntlet of terrifying terminology, tools, and techniques before permitting them to live in the programmable paradise of the FPGA oasis.
In automotive telematics, for example, there are already well-established solutions in place for most of the well-established problems. Typically, those solutions can be adapted and adopted to handle the new problems that come along as well. In working to establish their FPGAs in the in-cabin media segment of the automotive market, Xilinx apparently realized that they’d have to work closely with those existing solutions, and that they’d also need to make the barrier to adopting an FPGA-based platform so soft that the compelling advantages of programmability would shine through.
This week, Xilinx announced a complete solution supporting the Media Oriented System Transport (MOST) bus, typically used in high-end automotive applications. While support for a new networking protocol is typically far from front-page news, the strategy and implications of this one make it quite interesting. MOST has been largely relegated to very high-end automotive installations in applications such as rear-seat entertainment, DVDs, displays, and advanced safety features because of its comparatively high cost of deployment. One of the key drivers behind that cost was the lack of competitive MOST-compatible semiconductor solutions. By bringing FPGA flexibility at a low cost into the MOST market, Xilinx believes that they can propel FPGAs further into the automotive segment, and simultaneously fuel the expansion of MOST into the automotive mainstream.
MOST is a keystone for the integration of consumer and home electronics technologies into the vehicle environment, and by providing a low-cost and flexible chip platform to the OEM industry, Xilinx could help fuel the adoption of third-party manufacturers building MOST-compatible subsystems that could be deployed across a wide range of vehicles from a number of different manufacturers.
In going after the new applications, Xilinx saw the need to go well beyond the delivery of a competent chip platform with a handy set of application notes. Xilinx and its partners produced what they call an “end-to-end” solution including all the required hardware and software elements you need to get up and running. The solution includes IP cores for the MOST NIC that is compatible with Xilinx “XA” automotive FPGA families (specially qualified versions of their commercial Spartan and Virtex lines) and with both their MicroBlase and PowerPC processors. It also includes an embedded development platform with a MOST daughter card. The solution supports a 24.8 Mb/s streaming port with logical channel-based support for synchronous and asynchronous data. Xilinx claims the solution is suitable for use in applications requiring real-time processing, such as DVD players, GPS, head units, and displays.
Xilinx has partnered with Mocean Laboratories of Sweden to offer a library of MOST-compatible cores and software interfaces. The library includes elements such as network services middleware, digital transmission content protection (DTCP), data router, and asynchronous sample rate converter. Xilinx has also partnered with Integrated Device Technology (IDT) of San Jose to provide a chip that handles clock generation and recovery. The complete MOST solution from Xilinx and its partners is available starting in Q4, 2006.
In stitching together such a ready-to-roll solution, Xilinx has hinted at the course programmable logic vendors must steer in order to succeed in new, expansion markets such as automotive. Xilinx has also shown that it is not wedded to its historic “one stop shopping” mentality, and is willing to partner in order to bring a compelling new programmable logic option to the designer’s table. The typical automotive OEM trying to bust-out an OEM-ready DVD player for adoption by two or three major car companies may not have the time to work out LUT truth tables by hand, or to learn the vagaries of timing closure in place and route, or even to figure out how to wed the programmability of an FPGA-based architecture into the relatively rigid environment of automotive network protocols. If the FPGA industry wants to play in such a market, they need to meet that designer more than halfway.
While these customers may not be your classic FPGA designer, neither is a Xilinx FPGA their classic answer to an automotive electronics problem. A bridge built into such a market must be started on the side of the supplier. In that strategy, Xilinx is off to a good start.
