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Engineers Speak Out

The Voice of the FPGA Design Community

A few weeks ago, in our “What’s your Persona?” feature article, we discussed the fact that Xilinx is creating new divisions for DSP and embedded processing. We speculated that the idea of focusing on specific categories of new potential FPGA customers, creating groups inside the FPGA company that understand the design challenges and speak the technical jargon of each emerging subculture, would be a compelling strategy.

We then decided to test that theory by asking you to drop us a line telling us about yourself.

The response was both fascinating and overwhelming.

We heard from the people we expected to hear from. We heard from the people we didn’t expect to hear from. We heard from people we never even heard of. We heard many things we expected to hear and many things that we never considered. What we can now conclude is that the situation in the ASIC and FPGA market is even more interesting and complex than we’d imagined. The responses also make us believe that programmable logic is likely to dominate the digital design domain over the next decade.

We heard from the classic, experienced, designer – the guy who’s been doing digital design for a long time, understands it well, and considers FPGA just another device to get the design done:

I started life with 74S74s – moving to 74Fs then 74FCTs, then to PALs, then FPGAs using schematics. I still think in terms of CLBs and FFs. I’m using VHDL these days because that’s what the tools want.

I’m amazed by the number of people who don’t understand how the code gets mapped into gates, CLBs, and FFs “Well, why doesn’t  ‘if then else if then else if then else…’ work very well???”

I’ll do DSP, embedded processors, whatever it takes; as long as it’s some multiple of 4 bits, and I get to use Xilinx parts.

We also heard from many designers who have spent a career in other disciplines and have been tossed into the FPGA fray:

I work on embedded software. I learned Xilinx when I needed to make a simple change to let me debug my firmware before the other computer in the system was ready.

Later, I worked on a couple of Xilinx designs (3090) that coupled my software to the real world.

Currently, I’m in software testing and don’t get to work on the FPGA board which is in place of the ASIC that the real system will use.

We also discovered the renaissance-man, evangelist – the designer who’s dragging their company by the ears into the programmable logic pool, insisting that the water isn’t too deep and that the benefits outweigh the risks:

I’ve worked for 20 years in the UK defence industry mostly with a small company that regards itself as a system integrator although it actually does a fair amount of electronic design. 10 to 15 years ago the company was using PALs but it seems to have got stuck at that point. I now work for it as a consultant and have started using FPGAs and CPLDs. I had to teach myself VHDL out of a book but what staggered me was the really low cost of entry e.g using the Xilinx WebPack software. I think all the press concentration on the leading edge of programmable logic gives the impression that you have to spend £50,000 to get started which is absolutely not true – even a good simulator (eg.Aldec) comes out at £5000 ish – about the same as a reasonable PCB layout system.

Now I’m an evangelist for FPGAs / CPLDs within the company – trying to convince them that the entry costs are OK and the training times manageable. I did my PhD in signal processing and use MATLAB from time to time so the next step for me is to investigate automatic DSP hardware generation.

A voice never heard in ASIC was the lone innovator – the inventor, small startup, or hobbyist working solo with limited budget but doing design work that would have been cutting-edge ASIC even 18 months ago. There is an explosion of this type of activity, thanks to the low cost of entry into FPGA design, and even into FPGA-based embedded system design:

I am an electronic hobbyist and love to play with new developments. I own a CPLD-board with two FPGAs on it.

Too small to implement a picoblazer but I am not yet fluent enough in VHDL to miss that possibility.

I am glad I touched the surface of all that FPGA stuff. In the past I did some experiments with an [Analog Devices] EZ-Lite SHARC DSPboard.

Nowadays the world of CPLD and SHARC meet each other in the new developments that you describe.

Very exciting possibilities and challenges!

As we expected, we encountered many engineers riding the end of the ASIC wave into FPGA design:

 I’ve taken so many left turns in my career it’s hard to nail down what my persona is.  I wanted to be a hardware engineer so the first thing I did when I got into engineering (from mfg) was firmware.  Then I scratched and clawed my way into an ASIC only to have it cancelled after six months, along with the rest of hardware.

In my next job I changed industries and targeted board and FPGA design, thinking if I ever made my own product that would be the skills I’d need.

Then I got my MS in ASIC Design and Test.  I decided the place you want to be is ASICs.  I’ve worked on several ASICs at a couple companies.  Then I did an FPGA and I have decided this is what I most enjoy doing.  Instant gratification, more control over the whole project, no company-wide notification when you invert the sense of a flag, lower NRE and shorter design cycles.

So I guess I am merely an FPGA Designer, although I’ve done my share of board, firmware, ASIC design and even dabbled in DSP.

We also ran into several of the more purposeful, high budget migrations from ASIC to FPGA:

I work for a very large telecoms company. For 16 years we design ASICs for almost every project. For ASIC design, our company has large CAD tools organization just to support tools and test new tools. We spend huge amount of money each year with two main EDA companies for ASIC tool access and support.

Even two or three years ago, our management made the decision to switch from ASIC to FPGA. From that time, each ASIC project must prove that it cannot possibly use FPGA. This past year, only one ASIC project is approved. Our CAD tools group is down now to just one or two guys. On the tools side, instead, each group is now responsible to choose and support its own tool environment. Most groups use Synplicity combined with the Xilinx and Altera tools. On the silicon side, we now deal with just two or three FPGA companies instead of the many ASIC companies we were previously using.

From the engineers’ side, this has not been a happy transition. Many engineers have been eliminated, and we are now about 20% smaller in designers than during our ASIC time. Engineers were also resistant to changing tools and changing to what they saw as lower technology. The CAD group first tried to manage FPGA tools, then gave up control when most of them were eliminated.

For productivity, though, we are now actually much better off. In our ASIC time, my group would take about 18 months to do each ASIC including some re-spin. Now we can do the same complexity design in three or four months with FPGA. Counting the several versions and NRE of each ASIC design, the total cost for FPGA parts is actually much cheaper. Also, we now design our FPGA to be reprogrammed in the field, so we can upgrade our customer on the same hardware instead of making a completely new box each year.

In total, with 20% smaller division, we are now making more than double the designs as before and our systems in the field have a longer life for our customers. I think, even if not someday FPGA, all our future custom solutions must incorporate hardware programmability.

What do we see in these selected tea-leaves of technological experience?

1. DSP is not a niche

It is no accident that almost all of the selected responses we published mentioned designing DSP as part of their project. The overwhelming majority of the respondents said that at least part of their design was DSP. If this sample is representative of the industry, we’d have to conclude that any FPGA silicon/software solution that does not have a DSP component is either niche-market bound or woefully shortsighted.

2. Embedded design is ubiquitous

Embedded system content is not an OR function. It is an AND. Most of the feedback to our article mentioned embedded processors as part of their design. Again, if this feedback is a representative sample, those Nios and MicroBlaze cores are going to rapidly become the most widely deployed embedded processors in the world.

3. The FPGA design community is exploding

Engineers are coming to FPGA design in droves from a variety of directions: ASIC, DSP, embedded software/firmware – all are converging on programmable logic as a delivery vehicle for their designs.

4. FPGA is its own methodology

Even though engineers are entering with diverse backgrounds, goals, and methods, the resulting FPGA design methodology is different from all those origins. It is not just a different platform for ASIC-style design, embedded system design, or DSP implementation. The features and capabilities of programmable logic combine with its eccentricities to produce a completely new paradigm.

We’d like to thank the large number of readers who responded to our request for enlightenment. Even though we could publish only a selected few responses, the wisdom we gained from each e-mail guided our selection for what to publish and formed and reinforced our conclusions. Also, since over 90% of you asked to remain anonymous, we decided to keep it that way across the board.  

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