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Esperanto AI Chip Exploits Thousands of Minions

“The sad thing about artificial intelligence is that it lacks artifice and therefore intelligence.” – Jean Baudrillard

It’s turtles all the way down. That’s the takeaway from a deep dive into Esperanto’s upcoming AI chip, melodically named ET-SoC-1. It’s organized as layer upon layer of processor cores, memory blocks, and mesh networks as far as the eye can see. This thing scales better than a tuna. 

Esperanto Technologies</ … Read More → "Esperanto AI Chip Exploits Thousands of Minions"

Say Hello to Deep Vision’s Polymorphic Dataflow Architecture

Over the years (actually, decades, now I come to think about it), I’ve seen a lot of great silicon chip architectures and technologies pop up like hopeful contenders in a semiconductor Whack-A-Mole competition, only to fail because their developers focused on the hardware side of things and largely relegated the software — in the form of design, analysis, and verification tools — to be “something we’ll definitely get around to sorting out later.”

Of course, these companies did eventually cobble some low-level software tools together, something sufficient to allow them … Read More → "Say Hello to Deep Vision’s Polymorphic Dataflow Architecture"

Tiny Firm Makes Super-Fast RISC-V

“Racing makes heroin addiction seem like a faint craving for something salty.” — Peter Egan

What do a tiny 10-person engineering firm and zillion-employee Apple have in common? Not much, really, except that both have recently designed new microprocessors that combine high performance with low power consumption. Let’s see… fast CPU, licensed RISC architecture, low-power design rules… I think I’m detecting a pattern here. 

The tiny firm in question is < … Read More → "Tiny Firm Makes Super-Fast RISC-V"

Lattice Launches Mach-NX

Pop Quiz – which FPGA company has sold the most devices?

Nope, wrong. Guess again.

And… wrong again. Neither Xilinx nor Altera/Intel, despite hovering around 80% combined FPGA market share for the last couple of decades, has shipped the most FPGA devices. That distinction goes to Lattice Semiconductor, and not by a small margin. The reason, of course, is that, in recent years, Lattice has focused on the mid-range and low-end segment of the market, while the better-known programmable logic companies have struggled for supremacy … Read More → "Lattice Launches Mach-NX"

All I Want for Christmas Is My 176-Layer Flash

“I have a memory like an elephant. I remember every elephant I’ve ever met.” – Herb Caen 

When Micron first told me about their new 176-layer flash memory, I thought I must’ve misheard something. That’s a typo, right? Surely you don’t mean you’ve made a chip with 176 mask layers. How heavy is that thing? 

Turns out it’s true. Micron has gone up, not out, in an effort to increase the density of its flash memory chips. The … Read More → "All I Want for Christmas Is My 176-Layer Flash"

Ultra-Low-Cost Flexible ICs Make Possible Trillions of Smart Objects

As is usually the case, strange things are afoot in Max’s World (where the butterflies are bigger, the flowers are more colorful, the birds sing sweeter, and the beer runs plentiful and cold). Allow me to expound, elucidate, and explicate — don’t worry, I’m a professional, it won’t hurt at all (well, it won’t hurt me, but you’ll have to take your chances).

The word “pragmatic” is defined as “dealing with things sensibly and realistically … Read More → "Ultra-Low-Cost Flexible ICs Make Possible Trillions of Smart Objects"

When Obfuscated Code Is a Good Thing

“Syntactic sugar causes cancer of the semi-colons.” – anonymous 

Obfuscated code is normally considered a bad thing. Plenty of us write unintelligible code by accident, but, as a rule, we’re supposed to write code that’s clear, understandable, and maintainable. Clarity of purpose is a mark of good digital hygiene. 

But that goes out the window if you’re a security expert. In the crypto world, you want obfuscated code. You want … Read More → "When Obfuscated Code Is a Good Thing"

Advancing HLS Adoption – Xilinx, Silexica, Falcon

The history of digital hardware design is one of managing ever-increasing complexity by raising the level of design abstraction. When our digital circuits had four inputs, it was completely reasonable to do logic minimization with a Karnaugh map. When sequential logic was involved, a state diagram was a nice way to work things out, and we could generally draw a single page schematic with a dozen or so logic gates describing our implementation. As the number of logic gates soared, though, those schematics became hundreds of incomprehensible pages.

We leveled … Read More → "Advancing HLS Adoption – Xilinx, Silexica, Falcon"

Booting DOS from a Vinyl Record

“The difference between science and screwing around is writing it down.” – Adam Savage

Bonus points for creativity. A Slovakian engineer has finally solved the problem that we’ve all been struggling with. Namely, how do you boot MS-DOS from a 33⅓ RPM vinyl record? At last, we have a solution. 

As Jozef Bogin details in his blog, the process wasn’ … Read More → "Booting DOS from a Vinyl Record"

Spacing Out with Spin Memory

There’s an old saying that goes, “Standards are great… everyone should have one.” The problem being, of course, that so many people do, resulting in our being up to our armpits in the little rascals (not that I’m bitter, you understand).

Much the same thing applies to STEM (science, technology, engineering, and math) “laws” — there are now so many of these little scamps, and so many people dropping them willy-nilly into the conversation, that it makes my head spin. For example, I recently received an email saying, “As … Read More → "Spacing Out with Spin Memory"

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