editor's blog
Subscribe Now

An Opening for MEMS PDKs

iStock_000025762659_Small.jpgCoventor recently announced the latest release of MEMS+, their MEMS EDA/CAD tool, and the timing was tough because it came just after I had an article involving process design kits (PDKs). And amongst the things that the latest MEMS+ release brings is movement towards MEMS PDKs (MPDKs).

MEMS devices are, of course, notorious for evading any attempts to rope in process and design options through standardization of any kind. Efforts continue, but it remains a challenge.

This means that any MEMS design involves a collaboration between a particular fab (captive or foundry) and the design folks to come up with a physical design that meets the requirements for a particular new sensor or actuator. And what’s done for some new design may have nothing to do with what has been done in the past. Materials may change, dimensions and shapes may change, and circuits and packages may change. Everything’s negotiable.

With the latest release of MEMS+, Coventor says that they’re enabling the use of PDKs for well-established sensors – IMUs, devices built on Leti’s MnNEMS process, and piezoelectric devices. The MPDK isn’t standardized, but then again, silicon circuit PDKs have also taken a long time to move towards standardization.

So Coventor is working, initially, with one fab and EDA company at a time, starting with XFAB and Cadence. You may recall from the silicon side that the first step away from incompatible PDKs for each tool/foundry combination was for a single foundry to unify its PDKs for all tools. So initially, for example, TSMC PDKs were different for Cadence, Synopsys, and Mentor tools, and then TSMC worked to unify the format.

But the result worked only at TSMC; GlobalFoundries and other fabs would have their own formats, even if unified across tools. This is the issue that the OpenPDK project has tackled since 2010.

This is the path that MPDKs are likely to take, according to Coventor. It would be nice if the lessons of the past allowed us to bypass some of the effort replication. For instance, if XFAB gets something going, it sure would be nice to use that as the basis for someone else, layering on change and generalizing rather than starting from scratch or even turning the XFAB-only MPDK into a similar-but-incompatible someone-else-only MPDK.

You can read more about this and the other new features in MEMS+ 6.0 in Coventor’s announcement.

Leave a Reply

featured blogs
Nov 23, 2022
The current challenge in custom/mixed-signal design is to have a fast and silicon-accurate methodology. In this blog series, we are exploring the Custom IC Design Flow and Methodology stages. This methodology directly addresses the primary challenge of predictability in creat...
Nov 22, 2022
Learn how analog and mixed-signal (AMS) verification technology, which we developed as part of DARPA's POSH and ERI programs, emulates analog designs. The post What's Driving the World's First Analog and Mixed-Signal Emulation Technology? appeared first on From Silicon To So...
Nov 21, 2022
By Hossam Sarhan With the growing complexity of system-on-chip designs and technology scaling, multiple power domains are needed to optimize… ...
Nov 18, 2022
This bodacious beauty is better equipped than my car, with 360-degree collision avoidance sensors, party lights, and a backup camera, to name but a few....

featured video

How to Harness the Massive Amounts of Design Data Generated with Every Project

Sponsored by Cadence Design Systems

Long gone are the days where engineers imported text-based reports into spreadsheets and sorted the columns to extract useful information. Introducing the Cadence Joint Enterprise Data and AI (JedAI) platform created from the ground up for EDA data such as waveforms, workflows, RTL netlists, and more. Using Cadence JedAI, engineering teams can visualize the data and trends and implement practical design strategies across the entire SoC design for improved productivity and quality of results.

Learn More

featured paper

How SHP in plastic packaging addresses 3 key space application design challenges

Sponsored by Texas Instruments

TI’s SHP space-qualification level provides higher thermal efficiency, a smaller footprint and increased bandwidth compared to traditional ceramic packaging. The common package and pinout between the industrial- and space-grade versions enable you to get the newest technologies into your space hardware designs as soon as the commercial-grade device is sampling, because all prototyping work on the commercial product translates directly to a drop-in space-qualified SHP product.

Click to read more

featured chalk talk

Gate Driving Your Problems Away

Sponsored by Mouser Electronics and Infineon

Isolated gate drivers are a crucial design element that can protect our designs from over-voltage and short circuits. But how can we fine tune these isolated gate drivers to match the design requirements we need? In this episode of Chalk Talk, Amelia Dalton and Perry Rothenbaum from Infineon explore the programmable features included in the EiceDRIVER™ X3 single-channel highly flexible isolated gate drivers from Infineon. They also examine why their reliable and accurate protection, precise and fast on and off switching and DESAT protection can make them a great fit for your next design.

Click here for more information about Infineon Technologies EiceDRIVER™ Isolated & Non-Isolated Gate Drivers