editor's blog
Subscribe Now

Design Management Goes Big Data

What could you do if you had access to a ton of data about semiconductor design? Things like:

  • How designs are structured
  • Which modules are used where
  • How long each module takes to design
  • Who’s making changes to what modules
  • How far along verification is proceeding
  • Log files on every tool run

Well, you could mash them all into a Big Data repository, set the dial to spin cycle, and – voilà! – out comes all kinds of interesting tidbits of information.

For one thing, as a manager, you could see in far more detail how the design is progressing and where any holdups might be. You could reallocate resources if necessary to nudge those holdups free and have everything come sailing across the finish line at the same time.

If you’re an accounting type, you could understand in much better detail how much each module is costing and how that cost should be allocated. (I sometimes wonder whether it’s more work to do the design or to decide who should pay for the design…)

You might notice that someone is wandering through all of the many bits and pieces that make up the design. Most designers tend to touch their own modules and the ones around them. If someone is going all over the place (or everywhere at once), is there possibly some IP theft going on?

And, the pièce de resistance: you could predict more accurately when the design will tape out.

Tapeout_prediction.jpg

(Image courtesy IC Manage)

This is something both IC Manage and Dassault are doing. Bringing “big data” (the next hottest buzzword after “IoT”) into the design management (DM) world. Their goals would appear to be similar, although they have different algorithms (and, because there are no benchmarks, it’s impossible to say who has the best ones). Dassault has a bit broader scope, including product lifecycle and manufacturing in the scope of data they scoop up.

Part of this involves employee monitoring, and IC Manage notes that some European companies – Germany in particular – place limits on how much of that an employer can do. So in those cases, they have to anonymize some of the information.

I also talked with them about the state of project scheduling. Back in the day, the winner was the guy that promised to do the fastest design (whether or not he or she actually met that schedule). If marketing or the senior VP decided some product had to be ready by some ridiculous date, you simply had to agree, or “they’ll find someone else that will agree” (a quote from a design manager I respected a lot).

IC Manage’s Dean Drako said that, these days, scheduling is much more realistic. Meeting your promised date is now a thing, and historical tools provide evidence as to whether or not a prediction is realistic, over-aggressive, or sandbagged.

You can read more about IC Manage’s Envision offering in their release. (Dassault didn’t have a recent announcement on this… There’s some general information here…)

Leave a Reply

featured blogs
Jan 23, 2020
In my presentation "What the FAQ is an FPGA?" we will rend the veils asunder and reveal all, so attendees had best wear dark glasses....
Jan 23, 2020
Embedded design trends typically revolve around three main ideas: faster data rates, smaller form factors and cost-effective solutions. Those design trends drive the theme for the 2020 Embedded Tech Trends forum: The Business and Technology Forum for Critical and Intelligent ...
Jan 22, 2020
Master the design and verification of next gen transport: Part One – Overview Master the design and verification of next gen transport: Part Two – High-Level Synthesis Master the design and verification of next gen transport: Part Three – Functional Safety M...
Jan 17, 2020
[From the last episode: We saw how virtual memory helps resolve the differences between where a compiler thinks things will go in memory and the real memories in a real system.] We'€™ve talked a lot about memory '€“ different kinds of memory, cache memory, heap memory, vi...

Featured Video

Automotive Trends Driving New SoC Architectures -- Synopsys

Sponsored by Synopsys

Today’s automotive trends are driving new design requirements for automotive SoCs targeting ADAS, gateways, connected cars and infotainment. Find out why it is essential to use pre-designed, pre-verified, reusable automotive-optimized IP to meet such new requirements and accelerate design time.

Drive Your Next Design to Completion Today with DesignWare IP® for Automotive SoCs