editor's blog
Subscribe Now

Sensor Hub Power Drops Again

ArcticLink_3_S2_PR_Image_FINAL_cr.jpgQuickLogic is back, pushing power numbers down again. They’re now touting what they say is the lowest-power sensor hub, at 75 µW, with their ArcticLink 3 S2 LP.

You may recall that QuickLogic’s ArcticLink 3 is a “custom PLD,” if you like. It’s got an internal programmable fabric, plus hardened logic and a couple of processors. The solution, much of which comes pre-canned, is a combination of logic and state machine and multipliers and microcode, with a modicum of programmability. It’s a carefully crafted approach, as we discussed a while back.

QuickLogic has come back a couple of times with power reductions on their original device. I asked what changed in the S2 LP vs. the prior S2: process and design tweaks. There’s no functional difference. I asked if there was ever a reason to use the S2 instead of the S2 LP; their answer was, “Not really.” So it seems to be a story of “lower power for free.” How often do you get that?

Competitors will question how much processing this device will allow – it’s certain that there are other solutions – likely microcontroller-based – that could, with larger memories, handle more sophisticated algorithms – at the cost of higher power. PNI can probably squeeze more algorithm-per-microwatt than a generic microcontroller since their solutions are largely fixed. (Programmability costs…) But they’re still higher than 75 µW.

But much of that is conjecture and gut-feel on my part. Where the breaking point is for each of these architectures… well, I don’t know if anyone has a real answer to that. Almost makes you wish for some way of figuring out what can go into which device for how much power.

You can read more in QuickLogic’s announcement.

 

(Image courtesy QuickLogic)

Leave a Reply

featured blogs
Jul 25, 2021
https://youtu.be/cwT7KL4iShY Made on "a tropical beach" Monday: Aerospace and Defense Systems Day...and DAU Tuesday: 75 Years of the Microprocessor Wednesday: CadenceLIVE Cloud Panel... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Jul 24, 2021
Many modern humans have 2% Neanderthal DNA in our genomes. The combination of these DNA snippets is like having the ghost of a Neanderthal in our midst....
Jul 23, 2021
Synopsys co-CEO Aart de Geus explains how AI has become an important chip design tool as semiconductor companies continue to innovate in the SysMoore Era. The post Entering the SysMoore Era: Synopsys Co-CEO Aart de Geus on the Need for AI-Designed Chips appeared first on Fro...
Jul 9, 2021
Do you have questions about using the Linux OS with FPGAs? Intel is holding another 'Ask an Expert' session and the topic is 'Using Linux with Intel® SoC FPGAs.' Come and ask our experts about the various Linux OS options available to use with the integrated Arm Cortex proc...

featured video

Intelligent fall detection using TI mmWave radar sensors

Sponsored by Texas Instruments

Actively sense when a fall has occurred and take action such as sending out an alert in response. Our 60GHz antenna-on-package radar sensor (IWR6843AOP) is ideal for fall detection applications since it’s able to detect falls in large, indoor environments, can distinguish between a person sitting and falling, and utilizes a point cloud vs a person’s identifiable features, which allows the sensor to be used in areas where privacy is vital such as bathrooms and bedrooms.

Click here to explore the AOP evaluation module

featured paper

Configure the backup voltage in a reversible buck/boost regulator

Sponsored by Maxim Integrated

This application note looks at a reference circuit design using Maxim’s MAX38888, which provides a supercapacitor-based power backup in the absence of the system rail by discharging its stored charge. The backup voltage provided by the regulator from the super cap is 12.5% less than the system rail when the system rail is removed. This note explains how to maintain the backup voltage within 5% of the minimum SYS charge voltage.

Click to read more

featured chalk talk

SN1000 SmartNIC

Sponsored by Xilinx

Cloud providers face a variety of challenges with moving data from one place to another. In modern data centers, flexibility is a key consideration - on par with performance. Software-defined hardware acceleration offers a major breakthrough in flexibility. In this episode of Chalk Talk, Amelia Dalton chats with Kartik Srinivasan of Xilinx about the details of Smart NICs with the new Alveo SN1000 with composable hardware.

Click here for more information about the Alveo SN1000 - The Composable SmartNIC