editor's blog
Subscribe Now

Monolithic Plastic… Or Not

With semiconductors, we have this expectation that, at some future time, we’ll be able to integrate everything onto a single chip. Analog, digital, MEMS… you name it.

And, theoretically, we will be able to. In fact, we probably can now. Do we? Nope. And it’s even less likely as we keep moving forward.

Why? Because the most advanced wafers are freakin’ expensive. If there’s a bunch of your stuff that will work at 28 or 180 nm, you’re going to do that because it’s so much cheaper than, say, 14 nm. And if the different components have different yields, then you don’t want to be throwing away large chunks of expensive good silicon because one small area is bad. So you’ll use the cheapest possible process for each element, and then bring the individual tested chips together on an interposer of some sort – or maybe even stack 3D – and call it good.

Yield makes a big difference here. If you think about what InvenSense does with their gyroscopes, for example, they take a MEMS wafer and an ASIC waver and mate them face-to-face. That means that you may end up throwing away a good MEMS die if it happens to mate with a failing ASIC die – and vice versa. So the only way this works is if the yield is high enough to make such loss negligible. If that’s not the case, then you want to test and singulate the wafers independently and co-package only the good units.

So… that’s semiconductors, over there in that corner. Over here in this other corner, we have printed electronics. Whole different ballgame. And it brings with it the promise of printing entire systems in a single roll-to-roll printing pass.

Or… maybe not.

I had a conversation with Thinfilm at last November’s IDTechEx show. They make a wide variety of memories and other components printed on plastic, you could consider doing the same for your business with something like ldpe sheets from a plastic manufacture. Their first generation was roll-to-roll memory for “consumables” – things that will be used and then discarded, like labels*. And it was printed on rolls 12” x 1 km.

The second generation, however, has more than just memory. There may be sensors and radios, such as are on their sensor labels.

But these are no longer printed in a single pass on a long roll. In fact, some of it isn’t even roll-to-roll. And some of the components, at present (like passives), aren’t even printed; they’re discrete.

Why not just do them all together? Same reason as we don’t with semiconductors: yield. If you commit everything together, then you may end up throwing away lots of good stuff due to a little bit of bad stuff. So their printed subsystems are manufactured and tested – in three different locations (Korea, Sweden, and San Jose), and then these are mounted on a plastic substrate with printed connections. This last step is a sheet process, not roll-to-roll.

Thinfilm_image_cr.jpgMight this eventually evolve, as yields improve, to higher levels of integration? Yes, they say. But there’s always going to be a leading edge, and leading edges tend not to yield as well as established processes. So any product incorporating aggressive, novel technology is likely to be pieced together.

In other words, we’re unlikely ever to be working solely on a fully-integrated roll-to-roll basis.

You can find out more about Thinfilm here.

Meanwhile, there’s  whole different reason for resisting integration that we’ll talk about in a few days

 

 

*The military also uses the word “consumable” as a quaint euphemism for ammunition – hardware that will be used once and then be, shall we say, taken out of action. And “smart” versions of such hardware will have electronics on them.

 

(Image courtesy Thinfilm.)

Leave a Reply

featured blogs
Jun 6, 2023
At this year's DesignCon, Meta held a session on '˜PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems.' Presented by Kundan Chand and Grace Yu from Meta, they talked about power integrity (PI) analysis using Sigrity Aurora and Power Integrity tools such...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....
Jun 2, 2023
Explore the importance of big data analytics in the semiconductor manufacturing process, as chip designers pull insights from throughout the silicon lifecycle. The post Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics appeared first on New Hor...

featured video

Synopsys Solution for Comprehensive Low Power Verification

Sponsored by Synopsys

The growing complexity of power management in chips requires a holistic approach to UPF power-intent generation and low power verification. Learn how Synopsys addresses these requirements with a comprehensive solution for low-power verification.

Learn more about Synopsys’ Energy-Efficient SoCs Solutions

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Beyond the SOT23: The Future of Smaller Packages
Sponsored by Mouser Electronics and Nexperia
There is a megatrend throughout electronic engineering that is pushing us toward smaller and smaller components and printed circuit boards. In this episode of Chalk Talk, Tom Wolf from Nexperia and Amelia Dalton explore the benefits of a smaller package size for the SOT23. They investigate how new package sizes for this SMD can lower your BOM, decrease your board space and more.
Oct 20, 2022
28,233 views