editor's blog
Subscribe Now

ARM embraces 26262 Auto safety standard update

A couple of months ago, I wrote about ISO 26262 and the changes that this was forcing on the chip development process. (Spaghetti versus ISO 26262 https://www.eejournal.com/archives/articles/20141125-iso26262).

Many of the chips used in vehicles use ARM processor cores, particularly the Cortex-R5, and today ARM has announced that it is making available a safety document set that provide developers with the information needed to demonstrate that their products are suitable for use in systems that meet the highest level (ASIL-D) of safety.

To do this, ARM went back over the entire development process, from initial specification through to final verification. This has been time consuming but as well as providing the material for the Cortex-R5, it confirmed that the development process was robust. It also means that the procedures are in place to produce the safety document sets as part of the normal development process for future cores.

The documentation can also be used for the core safety standard, IEC 61508 and other industry specific standards, such as IEC 62304 for medical products and DO-178 for defence.

As well as hardware, ARM is also supporting software. The ARM compiler is now certified by TUV-SUD as being appropriate for developing software for systems up to ISO 26262 ASIL-D and IEC 61508 SIL-3. Also within the R5, and other cores are functions like memory protection designed for safer software.

During the briefing Chris Turner of ARM came up with something that I hadn’t thought of. One of the consequences of ISO 26262 is that there is now a common process and language that runs through the automotive industry, from the manufacturers like Audi and Mercedes, down to the lowest level of suppliers – something that has never existed. This can only be a good thing.

Leave a Reply

featured blogs
Mar 30, 2023
Damen is an international shipbuilding group with more than 50 shipyards in over 120 countries. While bare hull resistance simulations have been their bread and butter for a long time, they're now looking at more complex simulations such as propulsion and maneuvering. With th...
Mar 29, 2023
Explore the new chip design frontier of AI-powered EDA tools and see how our Synopsys.ai chip design software redefines chip design, verification, and testing. The post AI Is Driving a New Frontier in Chip Design appeared first on New Horizons for Chip Design....
Mar 10, 2023
A proven guide to enable project managers to successfully take over ongoing projects and get the work done!...

featured video

First CXL 2.0 IP Interoperability Demo with Compliance Tests

Sponsored by Synopsys

In this video, Sr. R&D Engineer Rehan Iqbal, will guide you through Synopsys CXL IP passing compliance tests and demonstrating our seamless interoperability with Teladyne LeCroy Z516 Exerciser. This first-of-its-kind interoperability demo is a testament to Synopsys' commitment to delivering reliable IP solutions.

Learn more about Synopsys CXL here

featured chalk talk

Introduction to Bare Metal AVR Programming
Sponsored by Mouser Electronics and Microchip
Bare metal AVR programming is a great way to write code that is compact, efficient, and easy to maintain. In this episode of Chalk Talk, Ross Satchell from Microchip and I dig into the details of bare metal AVR programming. They take a closer look at the steps involved in this kind of programming, how bare metal compares with other embedded programming options and how you can get started using bare metal AVR programming in your next design.
Jan 25, 2023
9,204 views