editor's blog
Subscribe Now

Multicore Task-Management Standard Implemented

In spring of last year, we described a new standard from the Multicore Association for use in managing tasks on multicore embedded systems. Called MTAPI, it abstracts away details of exactly where a particular task might run at any given time, allowing for fixed or real-time binding to a core or hardware accelerator.MTAPI_image.jpg

Well, standards are all well and good, but then someone has to write code that actually implements the standard. Last month, Siemens announced an open-source BSD-licensed implementation that supports homogeneous multicore systems.

The MTAPI implementation was part of a larger multicore support package that they released, called Embedded Multicore Building Blocks (EMB2). It also includes implementation of some popular algorithm patterns as well as various structures and frameworks focused on streaming applications (an extremely common application type that is prone to challenging performance – meaning that effective multicore utilization makes all the difference).

They’ve segregated the code such that only a bottom base layer has any interaction with an underlying OS. This makes most of the code independent of the operating system (OS). They support Linux and Windows, but changes to the base layer will allow ready porting to other OSes.

Next year, they plan to support heterogeneous systems – a tougher deal because each node may have a different processing architecture, and memory may be scattered all over the system. In so doing, they’re likely to bring the venerable MCAPI standard into play. That, the first of the Multicore Association standards, handles communication between disparate cores running different OS instances.

You can find more info in their announcement.

Leave a Reply

featured blogs
Nov 14, 2019
In addition to playing retro games, THEC64 allows you to write your own programs in C64 or VIC 20 BASIC....
Nov 14, 2019
The Cadence Academic Network hosted an Academic Speaker Series event, in collaboration with the Shanghai Site Technical Talk series, in Cadence Shanghai Office. The talk attracted more than 150... [[ Click on the title to access the full blog on the Cadence Community site. ]...
Nov 14, 2019
Scientists, researchers, and data analysts from academia, industry and government agencies will be center stage at SC19 next week in Denver. SC19 is the International Conference for High Performance Computing, Networking, Storage, and Analysis. Next-generation high-performanc...
Nov 13, 2019
By Elven Huang – Mentor, A Siemens Business SRAM debugging at advanced nodes is challenging. With pattern matching and similarity checking, Calibre tools enable designers to more quickly and precisely locate SRAM modification errors and determine the correct fix. Static...
Nov 8, 2019
[From the last episode: we looked at the differences between computing at the edge and in the cloud.] We'€™ve looked at the differences between MCUs and SoCs, but the one major thing that they have in common is that they have a CPU. Now'€¦ anyone can define their own CPU ...