editor's blog
Subscribe Now

Haptics in a Microcontroller?

TI caught my eye when they released a microcontroller that they said was “haptics-enabled.” A few seconds of thought convinced me that this concept needed some unpacking.

Haptics is all about devices providing feedback through some kind of touch mechanism. It could be as passive as raised bumps telling you that your fingers are in the right place, or it could be through vibrations or other active events that you can feel. It’s a hot topic, one we’ll probably be seeing much more of.

But… TI’s new MSP430TCH5E microcontroller is… a microcontroller. How can that generate haptic feedback? Does it have a specific hardware module for driving a specific vibratory engine? Seems unlikely, since haptics has lots of ways of being implemented; there’s no “mainstream” mechanism that’s suitable for hardening. Is there?

The release does talk of software libraries and SDKs. Could this be just about software? But… if so, why is it unique to this microcontroller?

I checked in with them, and the details of whatever the answer is are confidential; they’re not saying. But it does have to do with protecting IP. So my take on it is that this is a microcontroller/software bundle that includes haptic libraries. And you can’t use those libraries on other microcontrollers. Why not? Not sure… it could be the license: to get this you most likely have to promise to play by their rules. And if the solution is worth it, most upstanding businesses are not willing to risk legal hassles by playing games trying to port to another processor.

But it may also be that there’s some kind of hardware lock – something specifically put in place that the libraries interrogate to ensure that they’re running on a designated platform. Since, as far as I know, this specific microcontroller isn’t available without the haptics library, that may be the case. (It would be an easy design strategy to have a basic platform that simply has an ID that can be changed with one mask to make the device “unique.”)

I don’t know if this is what they did, but it would certainly be doable, and would add some practical teeth to the license. And if the low-level code is in machine language, it would be really hard to hack.

You can read more about what you can do with this in their announcement. And if you have any other clues about what’s going on, please post in the comments.

Leave a Reply

featured blogs
Jul 25, 2021
https://youtu.be/cwT7KL4iShY Made on "a tropical beach" Monday: Aerospace and Defense Systems Day...and DAU Tuesday: 75 Years of the Microprocessor Wednesday: CadenceLIVE Cloud Panel... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Jul 24, 2021
Many modern humans have 2% Neanderthal DNA in our genomes. The combination of these DNA snippets is like having the ghost of a Neanderthal in our midst....
Jul 23, 2021
Synopsys co-CEO Aart de Geus explains how AI has become an important chip design tool as semiconductor companies continue to innovate in the SysMoore Era. The post Entering the SysMoore Era: Synopsys Co-CEO Aart de Geus on the Need for AI-Designed Chips appeared first on Fro...
Jul 9, 2021
Do you have questions about using the Linux OS with FPGAs? Intel is holding another 'Ask an Expert' session and the topic is 'Using Linux with Intel® SoC FPGAs.' Come and ask our experts about the various Linux OS options available to use with the integrated Arm Cortex proc...

featured video

Electromagnetic Analysis for High-Speed Communication

Sponsored by Cadence Design Systems

When your team is driving the future of breakthrough technologies like autonomous driving, industrial automation, and healthcare, you need software that helps meet approaching deadlines and increasingly high-performance demands. Learn how a system analysis solution can provide accurate 3D modeling, electromagnetic simulation, and electrothermal simulation at the chip, package, PCB, and system level.

Click to learn more

featured paper

PrimeLib Next-Gen Library Characterization - Providing Accelerated Access to Advanced Process Nodes

Sponsored by Synopsys

What’s driving the need for a best-in-class solution for library characterization? In the latest Synopsys Designer’s Digest, learn about various SoC design challenges, requirements, and innovative technologies that deliver faster time-to-market with golden signoff quality. Learn how Synopsys’ PrimeLib™ solution addresses the increase in complexity and accuracy needs for advanced nodes and provides designers and foundries accelerated turn-around time and compute resource optimization.

Click to read the latest issue of Designer's Digest

Featured Chalk Talk

Single Pair Ethernet

Sponsored by Mouser Electronics and HARTING

Industry 4.0 brings serious demands on communication connections. Designers need to consider interoperability, processing, analytics, EMI reduction, field rates, communication protocols and much more. In this episode of Chalk Talk, Amelia Dalton chats with Piotr Polak and McKenzie Reed of Harting about using single-pair Ethernet for Industry 4.0.

Click here for more information about HARTING T1 Industrial Single Pair Ethernet (SPE) Products