editor's blog
Subscribe Now

Going Expensive to Reduce Interposer Cost

Imec has been  working 2,5D IC issues with a particular focus on optimizing costs and, in particular, test yields. Yields can take what might have been straightforward-looking cost numbers and make things not so clear.

In their work on interposers, Eric Beyne took a look at three different ways of routing the signals from a wide-I/O memory. These puppies have lots of connections – like, 1200 per chip. He explored three different ways of implementing the interposer to find out which had the best cost outlook. The idea was to connect two such interfaces, with four banks of 128 I/Os each. Each channel had 6 rows of 50 microbumps. Microbump pitch along a row was 40 µm; along a column it was 50 µm. The two simply needed to talk to each other on the interposer.

The cheapest, most traditional approach is to use PCB (or PWB) technology. An aggressive version would have 20-µm pitch and 15-µm vias. This approach resulted in an 8-layer board; you can see the layout below – lots of routing all over the place. Wire lengths were, on average, 180% of the die spacing.

 

Laminate.png

 

Next was a semi-additive copper process – more aggressive dimensions and more expensive. Line pitch was 10 µm; vias were 7 µm. the tighter routing allowed connectivity with only 4 layers, and the average wire length was 166% of the die spacing. You can see the slightly less colorful result below.

 

RDL.png

 

Finally, they took an expensive approach: damascene metal lines. Moving from the PCB fab to the silicon fab. But this got them down to 2-µm pitch with 1-µm vias, and that was enough to run wires straight across on 2 layers with no extra routing. In other words, wire lengths were equal to the die spacing. You can see this on the following picture.

 

Damascene.png

 

So what happens to the overall cost? The last one is nice, but expensive to build. And here is where yield comes in. Because the “most expensive” option uses only two layers, it has the best yield. And that yield more than compensates for the expensive processing, yielding the cheapest option.

 

They didn’t give out specific cost numbers (they typically reserve those for their participants), but the net result is that they believe the damascene approach to be the most effective.

 

 

 

Images courtesy Imec.

Leave a Reply

featured blogs
Oct 23, 2020
Processing a component onto a PCB used to be fairly straightforward. Through hole products, a single or double row surface mount with a larger center-line rarely offer unique challenges obtaining a proper solder joint. However, as electronics continue to get smaller and conne...
Oct 23, 2020
[From the last episode: We noted that some inventions, like in-memory compute, aren'€™t intuitive, being driven instead by the math.] We have one more addition to add to our in-memory compute system. Remember that, when we use a regular memory, what goes in is an address '...
Oct 23, 2020
Any suggestions for a 4x4 keypad in which the keys aren'€™t wobbly and you don'€™t have to strike a key dead center for it to make contact?...
Oct 23, 2020
At 11:10am Korean time this morning, Cadence's Elias Fallon delivered one of the keynotes at ISOCC (International System On Chip Conference). It was titled EDA and Machine Learning: The Next Leap... [[ Click on the title to access the full blog on the Cadence Community ...

featured video

Demo: Inuitive NU4000 SoC with ARC EV Processor Running SLAM and CNN

Sponsored by Synopsys

See Inuitive’s NU4000 3D imaging and vision processor in action. The SoC supports high-quality 3D depth processor engine, SLAM accelerators, computer vision, and deep learning by integrating Synopsys ARC EV processor. In this demo, the NU4000 demonstrates simultaneous 3D sensing, SLAM and CNN functionality by mapping out its environment and localizing the sensor while identifying the objects within it. For more information, visit inuitive-tech.com.

Click here for more information about DesignWare ARC EV Processors for Embedded Vision

featured paper

An engineer’s guide to autonomous and collaborative industrial robots

Sponsored by Texas Instruments

As robots are becoming more commonplace in factories, it is important that they become more intelligent, autonomous, safer and efficient. All of this is enabled with precise motor control, advanced sensing technologies and processing at the edge, all with robust real-time communication. In our e-book, an engineer’s guide to industrial robots, we take an in-depth look at the key technologies used in various robotic applications.

Click here to download the e-book

Featured Chalk Talk

Power Supply Design

Sponsored by Mouser Electronics and KEMET

There is a bewildering range of choices for components for power supply design. Considering EMI protection, surge protection, transformers, rectifiers - the list goes on and on. In this episode of Chalk Talk, Amelia Dalton chats with Nick Stephen of KEMET to sort out the puzzle of power supply component selection, and to look at the latest trends and best practices in power supply design.

Click here for more information about KEMET Electronics METCOM MPX1 Metal Composite Power Inductors