editor's blog
Subscribe Now

CEVA Goes for Base Stations

Mobile communications have been one of CEVA’s focus areas (others being audio and images). If you’re new to CEVA, they do DSP cores for SoCs, focusing on low power as a critical feature. (They have lots of hardware features, but at the end of the day, whether it’s a hardware accelerator or an optimized instruction set, it all leads to lower power and longer battery life.)

We’ve covered them before (albeit getting distracted by the incredible alphabet soup that characterizes this market). As complexity has grown, they’ve seen the need for multiple DSP cores, so they put together a multicore platform.

But most of their mobile effort was going into DSPs that would reside in a handset. And yes, handsets have being going multicore for lots of reasons. And with the proliferation of smartphones, they have to be the most abundant example of heterogeneous multicore. In other words, different cores for different purposes – applications, baseband, graphics, etc. This requires an asymmetric model, with every core having its own OS and memory image (possibly sharing some memory for message passing and such).

But now they’re going for more than just the handset: they’ve just introduced a new XC4500 family that focuses on mobile infrastructure – and, specifically, base stations. You might think this would just be a bigger version of what they use in the handset, which is the XC4000 family. But it’s not, because what happens in a base station is very different from what happens in a phone.

A handset is all about taking a single call or session or whatever and breaking it down to extract the content and send that content to the appropriate places in the phone. That’s not at all what a base station does; it manages traffic. It doesn’t care, for the most part, what’s happening with any particular call or session; it’s just making sure everything gets to the right place. This is, basically, packet processing.

So while the phone needs all these different processors to handle the different aspects of the content, the base station simply needs to be able to scale what it does to accommodate the amount of traffic it has to handle. Which means that, unlike the phone, it can benefit from a homogeneous multicore architecture using a symmetric approach (SMP). If one core can process x calls, then n cores can process n*x calls. More or less (yeah, I know it’s not quite that simple…).

Which makes the XC4500 look different from the XC4000, even though they’re on opposite ends of the same airwave. It’s much more like a router than it is like a phone. Because it is a router of sorts. Traffic management features allow multiple independent queues and provide built-in dynamic scheduling. Data for a specific task is stored in shared memory, so assigning it to a specific core merely involves sending a pointer rather than a time-consuming data copy. They have cache coherency infrastructure to keep all of the cores’ caches in synch as well.

You might wonder, by the way, what the opportunity is for new base stations. And, apparently, there’s not a lot of movement in the traditional fiber/cable-backhaul market, where your wireless call gets sent to the mothership over a wire. But new installations are starting to favor wireless backhaul over microwaves. That’s where they see things looking up.

You can find out more in their release.

Leave a Reply

featured blogs
Apr 16, 2024
In today's semiconductor era, every minute, you always look for the opportunity to enhance your skills and learning growth and want to keep up to date with the technology. This could mean you would also like to get hold of the small concepts behind the complex chip desig...
Apr 11, 2024
See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.The post Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud appeared ...
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

ROHM's 4th Generation SiC MOSFET
In this episode of Chalk Talk, Amelia Dalton and Ming Su from ROHM Semiconductor explore the benefits of the ROHM’s 4th generation of silicon carbide MOSFET. They investigate the switching performance, capacitance improvement, and ease of use of this new silicon carbide MOSFET family.
Jun 26, 2023
33,517 views