editor's blog
Subscribe Now

Converging by Construction

Chip design has always consisted of a series of loops. Do something, check the effects, fix things, check again, and hopefully converge on a solution. A big part of the focus of EDA tools developers has been to make each of these passes faster and reduce the number of passes.

One of the critical things that has to be checked at the end of each layout pass is that the layout meets the design rules. A couple years ago, the DRC-checking part started moving to real-time with Mentor’s Calibre tool, which dominates DRC checking. It started with Mentor’s own InRoute (for digital) and then RealTime, for integration into custom layout tools like Laker (was Springsoft, now Synopsys). This meant that DRC rules were checked immediately with each layout change, eliminating one aspect of the long loop.

Not comprehended in that, however, was the electrical aspects of layout – the Rs and Cs (mostly parasitic) that accrue as you lay your chip out. Cadence has just announced a change to that. They call it “electrically-aware design,” and it moves the extraction and parts of verification from the end of the loop to “real-time.” You can feed forward voltage/current points from circuit simulation and monitor as you do layout; you can establish constraints and track adherence; you can get warnings when something you’ve done in layout creates an electromagnetic issue. You push a polygon and the tools recalculate the parasitics and update the performance numbers immediately, alerting if necessary.

The big win here is that it allows designers to “converge by construction” instead of doing an entire layout and then finding all the issues. It also lets designers push the edge a bit more. If you’re tight on your schedule (who isn’t?), then you might over-design to get things to pass – you’re not then going to go back and “back things off” until they fail in order to optimize since that will take too long. But with the real-time view of the impact of layout, you can see if you’ve over-designed and then make immediate adjustments to achieve a better balance.

It’s a simple concept with interesting potential for custom and analog designers. (And if you’re wondering about real-time DRC, Cadence already has that in place as well.)

You can find more details in their release.

Leave a Reply

featured blogs
Jan 22, 2025
Shouldn't Matter mean I can eliminate all my other smart home apps? Almost. When it comes to smart home apps, review what device types might need an app....
Feb 5, 2025
Return of Rock ranks Telegraph Road as 5th among Dire Straits' best songs, describing it as "A fourteen-minute masterpiece worth every second of its length'...

featured chalk talk

Easily Connect to AWS Cloud with ExpressLink Over Wi-Fi
Sponsored by Mouser Electronics and AWS and u-blox
In this episode of Chalk Talk, Amelia Dalton, Lucio Di Jasio from AWS and Magnus Johansson from u-blox explore common pitfalls of designing an IoT device from scratch, the benefits that AWS IoT ExpressLink brings to IoT device design, and how the the NORA-W2 AWS IoT ExpressLink multiradio modules can make retrofitting an already existing design into a smart AWS connected device easier than ever before.
May 30, 2024
34,344 views