editor's blog
Subscribe Now

The Next OCTEON

Cavium has recently announced the latest in their OCTEON line: following OCTEON II is OCTEON III. (Betcha didn’t see that one coming.) If there’s one major theme that seems to underlie their motivations for this family it’s that high-end functionality is moving to the low end. Specifically, in this case, the low end means enterprise access points and service provider gateways. The classic edge.

In particular, they appear very focused on security and network-attached storage. Security has traditionally been done elsewhere; NAS is on the ascendant.

For those of us that use “standard” computers, we’re used to running anti-virus software to combat threats. But an increasing number of people are doing significant things with their phones, and phones don’t have the bandwidth to do spam and virus prevention on top of what they’re already stretching to do. So the service providers are having to put protections at the gateway instead. And what used to be separate security functions like firewalling and content inspection are merging into so-called unified threat management (UTM) boxes.

NAS, to a large extent, involves making the cloud look like a local hard drive. Backup and restore from the cloud. (Although, as an aside, there’s one major hurdle to cloud backup: upload/download speeds. I’ve been using cloud backup. It took a month for the first backup to complete. Seriously. I just did a restore a couple days ago – a .pst file. 1.5 GB. First off, any connection interruption – like the computer going to sleep – completely restarted the restore. It took a total of 3 tries and about 7 hours to do. I was without email for all that time. I felt so bereft.)

The result is a quad-core SoC with three times the performance/power of OCTEON II. It has the usual OCTEON characteristic of a hardware scheduler to manage the packet traffic across the cores. But they’ve also added a hardware deep packet inspection (DPI) engine.

From a software standpoint, they’re providing full virtualization and they have turnkey NAS and DPI packages as well as other Linux apps appropriate to boxes in this part of the network.

You can get more info in their release.

Leave a Reply

featured blogs
Dec 5, 2023
Introduction PCIe (Peripheral Component Interconnect Express) is a high-speed serial interconnect that is widely used in consumer and server applications. Over generations, PCIe has undergone diversified changes, spread across transaction, data link and physical layers. The l...
Nov 27, 2023
See how we're harnessing generative AI throughout our suite of EDA tools with Synopsys.AI Copilot, the world's first GenAI capability for chip design.The post Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design appeared first on Chip Design....
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

Power and Performance Analysis of FIR Filters and FFTs on Intel Agilex® 7 FPGAs

Sponsored by Intel

Learn about the Future of Intel Programmable Solutions Group at intel.com/leap. The power and performance efficiency of digital signal processing (DSP) workloads play a significant role in the evolution of modern-day technology. Compare benchmarks of finite impulse response (FIR) filters and fast Fourier transform (FFT) designs on Intel Agilex® 7 FPGAs to publicly available results from AMD’s Versal* FPGAs and artificial intelligence engines.

Read more

featured chalk talk

Stepper Motor Basics & Toshiba Motor Control Solutions
Sponsored by Mouser Electronics and Toshiba
Stepper motors offer a variety of benefits that can add value to many different kinds of electronic designs. In this episode of Chalk Talk, Amelia Dalton and Doug Day from Toshiba examine the different types of stepper motors, the solutions to drive these motors, and how the active gain control and ADMD of Toshiba’s motor control solutions can make all the difference in your next design.
Sep 29, 2023
7,931 views