editor's blog
Subscribe Now

Big and Little Core Combos

A long while back ARM introduced their big.LITTLE concept. (So cute how they put the big in little letters and the little in big letters! Did you notice that?) The general concept is to have one beefy processor for heavy lifting and one small one for light duty; by powering them up and down, you can save energy by assigning the right core to the right task.

But at last week’s Multicore DevCon, processor guru Linley Gwennap showed, among other things, various ways in which companies are implementing this concept. Although, of course, ARM figures in all of them.

  • Nvidia includes an A15 CompanionCore (their original whitepaper shows an A9). Yeah, an A15 is the “little.” The point is that, unlike the other A15s on the chip, this one is optimized on the low-power end of the process, so it has less performance but consumes less power.
  • Samsung is going more the way ARM suggested: pairing an A15 with an A7. The A7 is 3.3 times more power efficient in MIPS/W; twice as efficient in MIPS/m2. But the A15 is 3 times faster.
  • Samsung’s Octa is more complicated. It has 4 A15s and 4 A7s, all software compatible so that any software can run on any of them. Problem is, Android is running on it, and, for now, Android doesn’t like mixtures of core types: it want’s homogeneous (apparently a future rev won’t). So you can’t run both sets of four cores at the same time. If you want performance, then you run the four A15s and the A7s are powered off; if you want to run with lower power, then you shut the A15s down and power up the A7s and run them. That’s where the software compatibility is critical.
  • Qualcomm fakes it, you might say. They have an A15, and they just clock it way down to save power. This is almost as effective as using an A7.

Clearly lots of ways to skin that cat…

Leave a Reply

featured blogs
Aug 13, 2020
My first computer put out a crazy 33 MHz of processing power from the 486 CPU. That was on “Turbo Mode” of course, and when it was turned off we were left with 16 MHz. Insert frowny face. Maybe you are too young to remember a turbo button, but if you aren’t ...
Aug 13, 2020
Hi readers! Welcome to Veri-Fire, a blog series that helps you deep dive into Virtuoso® ADE Verifier and learn about its various whys and hows. In this series, Walter Hartong, a Product... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Aug 13, 2020
Imagine ambling into a small town, heading to the nearest public house to blow the froth off a few cold beers, and hearing your AI whisper '€œ...'€...
Aug 7, 2020
[From the last episode: We looked at activation and what they'€™re for.] We'€™ve talked about the structure of machine-learning (ML) models and much of the hardware and math needed to do ML work. But there are some practical considerations that mean we may not directly us...

Featured Paper

True 3D EM Modeling Enables Fast, Accurate Analysis

Sponsored by Cadence Design Systems

Tired of patchwork 3D EM analysis? Impedance discontinuity can destroy your BER and cause multiple design iterations. Using today’s 3D EM modeling tools can take you days to accurately model the interconnect structures. The Clarity™ 3D Solver lets you tackle the most complex EM challenges when designing systems for 5G, high-performance computing, automotive and machine learning applications. The Clarity 3D Solver delivers gold-standard accuracy, 10X faster analysis speeds and virtually unlimited capacity for true 3D modeling of critical interconnects in PCB, IC package and system-on-IC (SoIC) designs.

Click here for more information

Featured Paper

Computational Software: 4 Ways It is Transforming System Design & Hardware Design

Sponsored by BestTech Views

Cadence President Anirudh Devgan shares his detailed insights on Computational Software. Anirudh provides a clear definition of computational software, and four specific ways computational software is transforming system design & hardware design -- including highly distributed compute, reduced memory footprints, co-optimization, and machine learning applications.

Click here for the white paper.

Featured Chalk Talk

Improving Battery-Life with Ultra Low-Power Processors

Sponsored by Mouser Electronics and NXP

Battery life is critical in today’s mobile device designs, and designing-in ever-larger batteries causes all sorts of awkward compromises. The best strategy is to lower power consumption, and the processor is a great place to start. In this episode of Chalk Talk, Amelia Dalton chats with Nik Jedrzejewski of NXP about the new NXP 7ULP, and how it will help you cut power consumption in your mobile design.

Click here for more information about NXP Semiconductors i.MX 8M Mini Applications Processors