editor's blog
Subscribe Now

Room-Temp Covalent Wafer Bonding

MEMS elements are delicate. They sit there in their little cavities, expecting to operate in some sort of controlled environment – perhaps a particular gas or pressure (or lack of it). And if they’re collocated with CMOS circuitry, then they need to be protected from any further processing steps. In other words, they need to be sealed off from the rest of the world. And wafer bonding is a common way to do that: bring another wafer (perhaps with etched features) face-to-face with the working wafer and get them to bond.

Covalent molecular bonds are the strongest; if you bring two silicon wafers together, for example, the ideal is to have the silicon atoms at the surface of each wafer bond covalently with their counterparts on the other wafer so that the whole thing starts to look like a continuous crystal. That’s the ideal.

Doing this isn’t trivial, of course, since the surfaces are likely to have imperfections and contaminants. So surface preparation has been an important part of the wafer bonding process. It has also involved intermediaries like water that establish a preliminary bond; an anneal then precipitates the reactions that result in the appropriate covalent bonds and out-diffusion of any extraneous elements.

Initially, high temperatures were required for the annealing. But, of course, anything over 450 °C won’t sit well with any CMOS that might be in place, so various surface preparation techniques have been devised to get the anneal temps down below that threshold.

But even these temperatures can be an issue for bonding unlike materials, or for wafers that have unlike materials in the stack, where stresses can result from differing rates of thermal expansion during the anneal process.

EVG has recently announced a new way of preparing the surface so that covalent bonding occurs immediately, at room temperature. To be clear, they have announced that they have this new process; they haven’t announced what it is; they’re still being coy on that. This eliminates the annealing step completely, and therefore the thermal expansion issue as well.

Equipment using this new technique should ship sometime this year. You can find out more in their release.

Leave a Reply

featured blogs
Dec 16, 2018
https://youtu.be/izP9iUskcXQ Made at the Cadence Marketing Holiday Party (camera Sean) Monday: RISC-V: Real Products in Volume Tuesday: IEDM: All About Interconnect Wednesday: The Conway... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Dec 13, 2018
In November, we continued our mobile updates to the website, released a couple of new content experiences, and made placing sample requests even easier. Read more below on these and the rest of the major updates to Samtec.com for November 2018. Continued Improvements to our M...
Dec 12, 2018
The possibilities for IoT devices, much like the internet itself, are endless. But with all of those possibilities comes risks....
Nov 14, 2018
  People of a certain age, who mindfully lived through the early microcomputer revolution during the first half of the 1970s, know about Bill Godbout. He was that guy who sent out crudely photocopied parts catalogs for all kinds of electronic components, sold from a Quon...