Two e-mails plopped in to the in-tray, both with the same time stamp
The first was headlined
ARM and Cadence Tape Out First 14nm FinFET Test Chip Targeting Samsung Process
The second
Samsung and Synopsys collaborate to achieve first 14 nanometre FinFET tapeout
Happy holidays!
 How Google and Intel use Calibre DesignEnhancer to reduce IR drop and improve reliabilitySponsored by Siemens Digital Industries Software Through real-world examples from Intel and Google, we highlight how Calibre’s DesignEnhancer maximizes layout modifications while ensuring DRC compliance. |
