editor's blog
Subscribe Now

Photonics on Different Silicon

The use of photons as signal carriers has historically gone towards long-distance transport, either over the air (feels like waves more than photons) or within fiber. But the distances of interest have dropped dramatically, to the point where there are discussions of using silicon photonics even for on-chip signaling.

In a conversation at Semicon West with imec’s Ludo Deferm, we discussed their current work. At this point, and for at least 10 years out, he doesn’t see CMOS and photonics co-existing on the same wafer. The bottleneck right now isn’t on-chip; it’s chip-to-chip. 40-60 Gb/s internally is fine for now. Which suggests the use of photonics in a separate chip in, for example, a 3D-IC stack or on an interposer: one for routing signals between the chips in the stack.

That photonic chip would be made with the same equipment as a CMOS chip – a specific goal of the imec work in commercializing silicon photonics, but it starts with a different wafer: SOI, with a thinner silicon layer than you would have in a typical CMOS wafer, and with that thickness (or thinness) tightly controlled to reduce optical losses.

You can read more about imec’s progress in their recent announcement.

Leave a Reply

featured blogs
Jul 5, 2022
The 30th edition of SMM , the leading international maritime trade fair, is coming soon. The world of shipbuilders, naval architects, offshore experts and maritime suppliers will be gathering in... ...
Jul 5, 2022
By Editorial Team The post Q&A with Luca Amaru, Logic Synthesis Guru and DAC Under-40 Innovators Honoree appeared first on From Silicon To Software....
Jun 28, 2022
Watching this video caused me to wander off into the weeds looking at a weird and wonderful collection of wheeled implementations....

featured video

Synopsys PCIe 6.0 IP TX and RX Successful Interoperability with Keysight

Sponsored by Synopsys

This DesignCon 2022 video features Synopsys PHY IP for PCIe 6.0 showing wide open PAM-4 eyes, good jitter breakdown decomposition on the Keysight oscilloscope, excellent receiver performance, and simulation-to-silicon correlation.

Click here for more information

featured paper

Addressing high-voltage design challenges with reliable and affordable isolation tech

Sponsored by Texas Instruments

Check out TI’s new white paper for an overview of galvanic isolation techniques, as well as how to improve isolated designs in electric vehicles, grid infrastructure, factory automation and motor drives.

Click to read more

featured chalk talk

Double Density Cool Edge Next Generation Card Edge Interconnect

Sponsored by Mouser Electronics and Amphenol ICC

Nowhere is the need for the reduction of board space more important than in the realm of high-performance servers. One way we can reduce complexity and reduce overall board space in our server designs can be found in the connector solutions we choose. In this episode of Chalk Talk, Amelia Dalton chats with David Einhorn from Amphenol about how Amphenol double-density cool edge interconnects can not only reduce space but also lessen complexity and give us greater flexibility.

Click here for more information about Amphenol FCI Double Density Cool Edge 0.80mm Connectors