editor's blog
Subscribe Now

Precipitating Out of the Cloud

Today we took a look at Vector Fabric’s new Pareon tool for parallelizing embedded code, and one of the things that makes it different from their prior tools is that they are no longer offering it in the cloud.

Vector Fabrics was one of the earlier tool vendors to make use of the cloud. Unlike some companies, they used the cloud as their only delivery mechanism. The entire tool GUI was a FLEX application executing in a browser.

But with Pareon, they’ve decided to revert to a more traditional delivery model (while keeping the GUI as is). And this is where you might automatically think, “Aha! See? No one wants to upload their crown jewels to the cloud!”

Well, there is still an element of that going on: some companies do indeed still have an issue with security. But the main drivers of their decision actually have nothing to do with that, and are very specific to their particular situation.

The biggest issue related to having libraries available in the cloud. It’s easy to analyze code in isolation if it doesn’t use any library calls. Not much code really works that way, however, meaning that, in addition to uploading your own program, you would need to upload libraries as well. This was a pain.

In order to minimize that, some people would isolate parts of their program for uploading to minimize their library call exposure. This was also a tough problem.

Things got even tougher when trying to support C++ because there are so many libraries. So, bringing things out of the cloud eliminates the issue entirely. It’s probably fair to say that the decision made it practical for them to claim support for C++.

The other issue that contributed was the simple fact that none of the other tools in the design environment were in the cloud. So there was this one piece of the tool chain in the cloud, outside the IDE; that can be a harder sell.

They do still see value having it in the cloud for things like training, for example, but, for mainstream use, Pareon will be executing locally, within users’ IDE.

Leave a Reply

featured blogs
Jun 18, 2021
It's a short week here at Cadence CFD as we celebrate the Juneteenth holiday today. But CFD doesn't take time off as evidenced by the latest round-up of CFD news. There are several really... [[ Click on the title to access the full blog on the Cadence Community sit...
Jun 17, 2021
Learn how cloud-based SoC design and functional verification systems such as ZeBu Cloud accelerate networking SoC readiness across both hardware & software. The post The Quest for the Most Advanced Networking SoC: Achieving Breakthrough Verification Efficiency with Clou...
Jun 17, 2021
In today’s blog episode, we would like to introduce our newest White Paper: “System and Component qualifications of VPX solutions, Create a novel, low-cost, easy to build, high reliability test platform for VPX modules“. Over the past year, Samtec has worked...
Jun 14, 2021
By John Ferguson, Omar ElSewefy, Nermeen Hossam, Basma Serry We're all fascinated by light. Light… The post Shining a light on silicon photonics verification appeared first on Design with Calibre....

featured video

Reduce Analog and Mixed-Signal Design Risk with a Unified Design and Simulation Solution

Sponsored by Cadence Design Systems

Learn how you can reduce your cost and risk with the Virtuoso and Spectre unified analog and mixed-signal design and simulation solution, offering accuracy, capacity, and high performance.

Click here for more information about Spectre FX Simulator

featured paper

An FPGA-Based Solution for a Graph Neural Network Accelerator

Sponsored by Achronix

Graph Neural Networks (GNN) drive high demand for compute and memory performance and a software only based implementation of a GNN does not meet performance targets. As a result, there is an urgent need for hardware-based GNN acceleration. While traditional convolutional neural network (CNN) hardware acceleration has many solutions, the hardware acceleration of GNN has not been fully discussed and researched. This white paper reviews the latest GNN algorithms, the current status of acceleration technology research, and discusses FPGA-based GNN acceleration technology.

Click to read more

featured chalk talk

High-Performance Test to 70 GHz

Sponsored by Samtec

Today’s high-speed serial interfaces with PAM4 present serious challenges when it comes to test. Eval boards can end up huge, and signal integrity of the test point system is always a concern. In this episode of Chalk Talk, Amelia Dalton chats with Matthew Burns of Samtec about the Bullseye test point system, which can maintain signal integrity up to 70 GHz with a compact test point footprint.

Click here for more information about Samtec’s Bulls Eye® Test System