editor's blog
Subscribe Now

A Buttable X-Ray Detector

Most image sensors receive light that has passed through a lens of some sort. This means that a large area can be photographed, for example, and sensed on a chip that is extremely small by comparison with the scene itself.

Not so with medical X-ray imaging. The target sensor gets a full-sized image. Not so hard for dental work, but more challenging for mammography or other full- or partial-body scans.

It’s typically hard, therefore, to provide a solid-state target that can provide seamless coverage. No matter how large they’ve been, they’ve had pixel addressing circuitry on two sides, meaning that you can’t tile them together. (At least not without having “blind stripes” where the decode logic blocks meet up…)

TowerJazz and Tanner worked together with the UK Science and Technology Facility Council’s Rutherford Appleton Labs to develop a unique decoding scheme that allowed them to restrict themselves to only one edge for the circuitry, allowing pixels all the way up to the other three edges. That means that you can tile them in any 2xN configuration.

With each sensor being basically the size of a 200-mm wafer (6.7 Mpixels), they can handle mammography applications with a 2×2 arrangement; longer targets are possible for other applications.

As to how they did the decoding? Yeah… they’re being coy about that. It seems to be largely an analog approach, which is where Tanner contributed to the process. But more details weren’t forthcoming…

You can read more in their release.

EDAS0088-STFCimagesensor_550px.jpg

Leave a Reply

featured blogs
May 24, 2024
Could these creepy crawly robo-critters be the first step on a slippery road to a robot uprising coupled with an insect uprising?...
May 23, 2024
We're investing in semiconductor workforce development programs in Latin America, including government and academic partnerships to foster engineering talent.The post Building the Semiconductor Workforce in Latin America appeared first on Chip Design....

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Enabling the Evolution of E-mobility for Your Applications
The next generation of electric vehicles, including trucks, buses, construction and recreational vehicles will need connectivity solutions that are modular, scalable, high performance, and can operate in harsh environments. In this episode of Chalk Talk, Amelia Dalton and Daniel Domke from TE Connectivity examine design considerations for next generation e-mobility applications and the benefits that TE Connectivity’s PowerTube HVP-HD Connector Series bring to these designs.
Feb 28, 2024
11,978 views