editor's blog
Subscribe Now

Full-Wave 3D IC Sign-Off

I mentioned Nimbic’s cloud moves the other day, but that’s just about the delivery vehicle for their tools. With respect to the tools themselves, their message at DAC this year was that they can now handle the package analysis needs of 3D IC projects with sign-off-level quality.

Those of us that are used to thinking in terms of die analysis might be given pause: multiple dice at advanced technology nodes, full wave, no shortcuts… wow, immense, right? Think about the grid you must need!

Well, not quite. This is package, not die, analysis. Bond pads and other package features aren’t shrinking quite as fast as the rest of the die, so what drives the challenge here is not so much a reduction in feature size, but increases in performance – that is, the wavelength of propagating signals. If the frequency doubles, then, because this is 3D, the mesh volume goes up by 8X.

Companies have been analyzing 3D ICs before now, but, according to Nimbic, they’ve been doing it by isolating critical geometries or partitioning the analysis and then reassembling the conclusions. So they say that this is the first opportunity to do the entire project in one go.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

One Year of Synopsys Cloud: Adoption, Enhancements and Evolution
Sponsored by Synopsys
The adoption of the cloud in the design automation industry has encouraged innovation across the entire semiconductor lifecycle. In this episode of Chalk Talk, Amelia Dalton chats with Vikram Bhatia from Synopsys about how Synopsys is redefining EDA in the Cloud with the industry’s first complete browser-based EDA-as-a-Service cloud platform. They explore the benefits that this on-demand pay-per use, web-based portal can bring to your next design. 
Jul 11, 2023
32,875 views