editor's blog
Subscribe Now

A New 3D IC Approach

While 3D ICs have been sexy for a while, actually building them has been a bit more of a stately process than simply talking about them. The details house numerous devils that must be worked out in order for the process to be manufacturable.

One way that TSMC is approaching it is through what they call CoWoS: Chip on Wafer on Substrate. This is a 2.5-D process, really: the multiple dice are mounted on a silicon interposer. The catch is that this happens while the interposer wafer is still whole. This allows known-good dice to be mounted and tested together using a wafer methodology instead of assembling onto interposers that have already been diced up.

Once the completed stack is diced up, they are mounted on the package substrate, and packaging proceeds as normal.

The issues driving this approach are concerns that potential customers of 3D IC processing have ostensibly had about having multiple players in the process, with wafers from different sources being shuttled to packaging houses for further assembly. Some companies apparently view such a process as risky. Using this process, TSMC controls and does everything up to and including getting the structures onto the package substrate (making me wonder whether it was really customers or simply TSMC who was concerned).

Cadence’s role was in the front-end design portion of the project. You have multiple dice that have to know something about each other in order for the required signals to meet properly, and in order for traces that start on one die and end on another, passing through the interposer en route, to be modeled properly. This can have a non-trivial effect on the design workflow, since changes on one die may have implications for another die, and such events must be communicated. It’s still a partially-manual process, but they’re laying down the infrastructure for this paradigm change.

Modeling of the TSVs themselves (which communicate from the interposer redistribution layer down to the package substrate) is also new.

Cadence expects TSMC to go into full production on this in 2013; right now, come customers are working with it in a pre-production state.

You can find more info in Cadence’s release

Leave a Reply

featured blogs
May 24, 2024
Could these creepy crawly robo-critters be the first step on a slippery road to a robot uprising coupled with an insect uprising?...
May 23, 2024
We're investing in semiconductor workforce development programs in Latin America, including government and academic partnerships to foster engineering talent.The post Building the Semiconductor Workforce in Latin America appeared first on Chip Design....

featured video

Introducing Altera® Agilex 5 FPGAs and SoCs

Sponsored by Intel

Learn about the Altera Agilex 5 FPGA Family for tomorrow’s edge intelligent applications.

To learn more about Agilex 5 visit: Agilex™ 5 FPGA and SoC FPGA Product Overview

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Peak Power Introduction and Solutions
Sponsored by Mouser Electronics and MEAN WELL
In this episode of Chalk Talk, Amelia Dalton and Karim Bheiry from MEAN WELL explore why motors and capacitors need peak current during startup, the parameters to keep in mind when choosing your next power supply for these kind of designs, and the specific applications where MEAN WELL’s enclosed power supplies with peak power would bring the most benefit.
Jan 22, 2024
17,653 views