editor's blog
Subscribe Now

Powering Up Power Analysis

Apache has just released their latest RedHawk version, RedHawk-3DX. In it they’ve focused on areas of growing importance for power: 3D ICs, working at the RTL level, and scaling up the size of sub-20-nm designs.

Power is of particular concern for 3D ICs because of the fact that a “cube” of silicon is much harder to cool than a plane. And it’s not a monolithic cube; it’s a bunch of interconnected planes that can become detached if you’re not careful. Even the TSVs can be problematic.

They’ve allowed concurrent analysis of each die and the interconnects and TSVs, with the ability to view each piece separately to see where the hot spots and physical stresses are. And they’re not just calculating heat or power; they are determining physical stresses as well. They do this with models, not with full finite-element (FE) analysis, although the models themselves may be created through more accurate FE methods.

RTL-level analysis is important for debug reasons. Most analysis is now done at the gate level, but most designers won’t have vectors at the gate level; only at the RTL level. And if problems are found at the gate level, it’s hard to debug them since that’s not the level designers work at.

So they now have the logic propagation technology in place to support RTL-level analysis with vector inputs. Vectorless analysis is also possible at the RTL and global levels; this is where you specify approximate transition frequencies on pins, and then probabilities (instead of actual events) are propagated to perform the analysis.

For scaling purposes, they have enabled hierarchical analysis, allowing different blocks to be analyzed independently, creating something akin to a bus-function model, where the periphery of the block is accurate while the internals aren’t. That way you can plug the blocks together to see how they interact and still complete the analysis in a reasonable time. A full chip can thus be analyzed with blocks done with or without vectors, at the gate or RTL level; you can mix and match.

There are lots of other details that you can get to via their announcement.

Leave a Reply

featured blogs
Jan 17, 2020
I once met Steve Wozniak, or he once met me (it's hard to remember the nitty-gritty details)....
Jan 17, 2020
[From the last episode: We saw how virtual memory helps resolve the differences between where a compiler thinks things will go in memory and the real memories in a real system.] We'€™ve talked a lot about memory '€“ different kinds of memory, cache memory, heap memory, vi...
Jan 16, 2020
While Samtec started as a connector company with a focus on two-piece, pin-and-socket board stacking systems, High-Speed Board Stacking connectors and High-Speed Cable Assemblies now make up a significant portion of our sales. To support development in this area, in December ...
Jan 16, 2020
Betting on Hydrogen-Powered Cars On-demand DRC within P&R cuts closure time in half for MaxLinear Functional Safety Verification For AV SoC Designs Accelerated With Advanced Tools Automating the pain out of clock domain crossing verification Mentor unpacks LVS and LVL iss...

Featured Video

RedFit IDC SKEDD Connector

Sponsored by Wurth Electronics and Mouser Electronics

Why attach a header connector to your PCB when you really don’t need one? If you’re plugging a ribbon cable into your board, particularly for a limited-use function such as provisioning, diagnostics, or testing, it can be costly and clunky to add a header connector to your BOM, and introduce yet another component to pick and place. Wouldn’t it be great if you could plug directly into your board with no connector required on the PCB side? In this episode of Chalk Talk, Amelia Dalton chats with Ben Arden from Wurth Electronics about Redfit, a slick new connector solution that plugs directly into standard via holes on your PCB.

Click here for more information about Wurth Electronics REDFIT IDC SKEDD Connector