editor's blog
Subscribe Now

Audio Upgrade

Used to be that there were processors (of the “regular” kind) and there were DSPs.  It’s no longer enough to be a DSP: you have to be the right kind. At least that’s how CEVA has rolled out their offering, with one family for communications, one for video and imaging, and one for audio and voice.

They recently announced the latest version of the latter, their TeakLite family. As in other areas that used to seem so simple and innocent, voice and audio processing have become increasingly sophisticated, with multiple microphones helping quash ambient noise (which we’ll talk more about in an upcoming feature), and even “beam forming”: an array of mikes that can zero in on an individual in a crowd – without moving the array, and with no noise. Creepy much? (It’s typically used for sports, but we all know that’s just a gateway stalk…)

Anyway, CEVA has announced four new cores. Two are for stand-alone DSP chip use, with one optimized for small area (single 32×32-bit MAC or dual 16×16-bit MAC), the other for performance (double the MACs plus optional audio instructions). The other two are for integration with a CPU on an SoC; they add cache controllers and an AXI interface to the first two.

Feeds and speeds can be found in their release

Leave a Reply

featured blogs
Jun 2, 2023
Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you'll find a community where employees share their perspectives and experiences. By providing a glimpse of their personal...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....
Jun 2, 2023
Explore the importance of big data analytics in the semiconductor manufacturing process, as chip designers pull insights from throughout the silicon lifecycle. The post Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics appeared first on New Hor...

featured video

Automatically Generate, Budget and Optimize UPF with Synopsys Verdi UPF Architect

Sponsored by Synopsys

Learn to translate a high-level power intent from CSV to a consumable UPF across a typical ASIC design flow using Verdi UPF Architect. Power Architect can focus on the efficiency of the Power Intent instead of worrying about Syntax & UPF Semantics.

Learn more about Synopsys’ Energy-Efficient SoCs Solutions

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

How IO-Link® is Enabling Smart Factory Digitization -- Analog Devices and Mouser Electronics
Safety, flexibility and sustainability are cornerstone to today’s smart factories. In this episode of Chalk Talk, Amelia Dalton and Shasta Thomas from Analog Devices discuss how Analog Device’s IO-Link is helping usher in a new era of smart factory automation. They take a closer look at the benefits that IO-Link can bring to an industrial factory environment, the biggest issues facing IO-Link sensor and master designs and how Analog Devices ??can help you with your next industrial design.
Feb 2, 2023
16,535 views