editor's blog
Subscribe Now

Firewalls Everywhere

We recently heard Netronome’s view on next-generation firewalls, and in particular, how they are migrating from the more traditional boundary protection to be distributed throughout compute farms on each rack.

Well, it goes beyond that, at least in Icon Labs’ view; I talked with them at ESC (or Design West, or ESC, a subsidiary of Design West). They point out the fact that embedded systems are all becoming hackable, with a few interesting examples:

–          Apparently if you send the right text message to the right phone number, you can defeat a car’s anti-theft mechanism and drive off with it. (“Dude, where’s my car??” “Oops, sorry, wrong number…”)

–          If you hack a printer, you can steal the images stored in memory.

–          Pacemakers have been successfully hacked in the lab.

So they see small, embeddable firewalls as critical to closing off these unexpected intrusions.  They need to be incorporated at the lowest possible levels in communications stacks, and they need to be worked into safety-critical standards. From a size standpoint, we are talking small: they target Zilog 8-bit MCUs, with 10-12K of ROM and 40K of RAM.

Whoever would have thought that 8-bit MCUs would be running firewalls…

Leave a Reply

featured blogs
Apr 16, 2024
In today's semiconductor era, every minute, you always look for the opportunity to enhance your skills and learning growth and want to keep up to date with the technology. This could mean you would also like to get hold of the small concepts behind the complex chip desig...
Apr 11, 2024
See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.The post Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud appeared ...
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

GaN FETs: D-Mode Vs E-mode
Sponsored by Mouser Electronics and Nexperia
The use of gallium nitride can offer higher power efficiency, increased power density and can reduce the overall size and weight of many industrial, automotive, and data center applications. In this episode of Chalk Talk, Amelia Dalton and Giuliano Cassataro from Nexperia investigate the benefits of Gan FETs, the difference between D-Mode and E-mode GaN FET technology and how you can utilize GaN FETs in your next design.
Mar 25, 2024
3,305 views