editor's blog
Subscribe Now

3D IC Design Suite

There’s lots of talk about 3D (and 2-1/2-D) ICs, with through-silicon vias (TSVs) being a key enabling technology. The possibilities are exciting, but the reality also appears to be challenging. Costs are high, there are still reliability questions to answer, and the overall design flow has yet to be thoroughly established. Even just simple questions like place and route have been the subject of early projects (involving at least one company that’s no longer in business).

Synopsys has recently announced their 3D-IC Initiative, essentially a collection of their EDA tools focused on hacking a flow through this technology jungle. It includes digital and custom design support, test, parasitic extraction, memory compilation, simulation, and more. All of which are impacted by 3D IC design.

Even though you might wonder, “How hard can it be to stack one die on top of another?” the answer appears to be, “Pretty hard.” At least until the tools settle down to make it easier.

More details in their release

Leave a Reply

featured blogs
Oct 27, 2021
ASIC hardware verification is a complex process; explore key challenges and bug hunting, debug, and SoC verification solutions to satisfy sign-off requirements. The post The Quest for Bugs: The Key Challenges appeared first on From Silicon To Software....
Oct 27, 2021
Cadence was recently ranked #7 on Newsweek's Most Loved Workplaces list for 2021 and #17 on Fortune's World's Best Workplaces list. Cadence received top recognition among thousands of other companies... [[ Click on the title to access the full blog on the Cadence Community s...
Oct 20, 2021
I've seen a lot of things in my time, but I don't think I was ready to see a robot that can walk, fly, ride a skateboard, and balance on a slackline....
Oct 4, 2021
The latest version of Intel® Quartus® Prime software version 21.3 has been released. It introduces many new intuitive features and improvements that make it easier to design with Intel® FPGAs, including the new Intel® Agilex'„¢ FPGAs. These new features and improvements...

featured video

DesignCon 2021 112G Ethernet & PCIe 6.0 IP Demos

Sponsored by Synopsys

This video features Synopsys' silicon-proven DesignWare 112G Ethernet and PCIe 6.0 PHY IP solutions successfully interoperating with Samtec's AI/ML edge connectors and Amphenol's Direct Attach Copper (DAC) cables with superior Bit Error Rates (BERs) at maximum performance.

Click here for more information about DesignWare 112G Ethernet PHY IP

featured paper

Voltage Balancing Techniques for Series Supercapacitor Connections

Sponsored by Maxim Integrated (now part of Analog Devices)

For applications where supercapacitors need to be charged to more than 2.5V or 2.7V, engineers are forced to connect multiple supercapacitors in a series. This application note reviews the voltage balancing techniques in series supercapacitor connections for Maxim’s MAX38886/MAX38888/MAX38889 backup regulators.

Click to read more

featured chalk talk

i.MX RT1170

Sponsored by Mouser Electronics and NXP Semiconductors

Dual Core microcontrollers can bring a lot of benefits to today’s modern embedded designs in order to keep all of our design requirements in balance. In this episode of Chalk Talk, Amelia Dalton chats with Patrick Kennedy from NXP about why newer design requirements for today’s connected embedded systems are making this balancing act even harder than ever before and how the i.MX RT1170 can help solve these problems with its heterogeneous dual cores, MIPI interface, multi-core low power strategy and SRAM PUF technology can make all the difference in your next embedded design.

Click here for More information about NXP Semiconductors i.MX RT1170 crossover microcontrollers