Chips that have reached, or are approaching, their end of life have been a perennial problem for systems makers for years. And the solutions have varied over time, with lifetime buys or the selling of the chip design to another company specializing in keeping older technology alive for longer than the original maker is interested in.

I remember seeing an email years ago from a Japanese customer that had decided they needed more of a long-obsolete chip. Their simple request was, “Can you please open up that fab again and make us some more? Kthanxbai.” The expectation was that a customer would never be told, “No,” and that we would re-open the old line, re-install the long-gone process, and make them some more chips. Now… I’m pretty customer-centric, but come on guys… But I digress.

RFEL has announced a new variant on substituting TI’s aging Graychip low-level DSP products: they reproduce the behavior in an FPGA. And there’s some nuance here: it’s actually not correct to say that it’s the behavior they duplicate – it’s the parameters. They may actually use a different algorithm, but they develop it using Matlab, and they use the Matlab models to prove to the customer that the parameters match those of the original Graychip devices.

Of course, this isn’t a pin-for-pin drop-in production replacement; it tends to get worked into a revision when it’s not worth completely re-architecting old functionality that works. It can, however, be a cost reduction.

They support both Altera and Xilinx, although they can’t use the same design for both… of course…

You can find more info in their release…