editor's blog
Subscribe Now

Benchmarking Android

With Android adoption continuing at a quick pace, there are more and more platforms available for users to choose from. But they don’t all perform equally. So how can developers (or even users) get a good sense of how the base system works?

You might think of just taking a particular app and trying it on different machines to compare. But the performance of a given app on a given system is highly dependent on the compiler optimizations used, so relying on that might amount to comparing the software builds more than the actual systems.

To address this, EEMBC has announced AndEBench for benchmarking Android platforms. In its first release, it focuses on the CPU and the virtual machine interpreter. It will gradually be augmented to test out other portions of the system like the graphics, audio, and networking.

The current emphasis is on integer operations, providing numbers for both native and Java execution. They perform numerous compiler optimizations in order to expose the true available performance of the system. You can also test the platform’s multi-threading capabilities by specifying the number of threads to spawn (although they had to add a Stop button, since, without it, if you dialed in too many threads, the system might disappear for, like, 15 minutes without your being able to call it back).

Apparently there are other benchmarking apps out there; EEMBC cautions that these typically have unclear pedigrees, and rarely make the source code available.

You can find more info in their release

Leave a Reply

featured blogs
May 7, 2021
In one of our Knowledge Booster Blogs a few months ago we introduced you to some tips and tricks for the optimal use of Virtuoso ADE Product Suite with our analog IC design videos . W e hope you... [[ Click on the title to access the full blog on the Cadence Community site. ...
May 7, 2021
Enough of the letter “P” already. Message recieved. In any case, modeling and simulating next-gen 224 Gbps signal channels poses many challenges. Design engineers must optimize the entire signal path, not just a specific component. The signal path includes transce...
May 6, 2021
Learn how correct-by-construction coding enables a more productive chip design process, as new code review tools address bugs early in the design process. The post Find Bugs Earlier Via On-the-Fly Code Checking for Productive Chip Design and Verification appeared first on Fr...
May 4, 2021
What a difference a year can make! Oh, we're not referring to that virus that… The post Realize Live + U2U: Side by Side appeared first on Design with Calibre....

featured video

Introduction to EMI

Sponsored by Texas Instruments

Conducted versus radiated EMI. CISPR-25 and CISPR-32 standards. High-frequency or low-frequency emissions. Designing a system to reduce EMI can be overwhelming, but it doesn’t have to be. Watch this video to get an overview of EMI causes, standards, and mitigation techniques.

Click here for more information

featured paper

Compact. Precise. Connected. Increase productivity with intelligent edge computing.

Sponsored by Texas Instruments

Smart devices in factories and buildings are getting smaller and more capable, with enhanced real-time control, robust connectivity, and configurable web services. Read about new processor technology that is unleashing the true potential of Industry 5.0 and the Internet of Things.

Click here to read more

featured chalk talk

Time Sensitive Networking for Industrial Automation

Sponsored by Mouser Electronics and Intel

In control applications with strict deterministic requirements, such as those found in automotive and industrial domains, Time Sensitive Networking offers a way to send time-critical traffic over a standard Ethernet infrastructure. This enables the convergence of all traffic classes and multiple applications in one network. In this episode of Chalk Talk, Amelia Dalton chats with Josh Levine of Intel and Patrick Loschmidt of TTTech about standards, specifications, and capabilities of time-sensitive networking (TSN).

Click here for more information about Intel Cyclone® V FPGAs