editor's blog
Subscribe Now

Better VIP Performance

As SoC designs have ballooned in size and scope, so has the effort required to verify them. A big part of what makes such large designs possible is the use of IP, especially for complex protocols. So that IP needs to play into the verification of the SoC.

But, while IP has raised the level of abstraction for design, it has lagged behind in verification. As Synopsys sees it, even just the complexity of design that’s now possible has driven up the verification burden tremendously due to what is now a scenario count twenty times higher than in the past.

Two of the biggest challenges are straightforward: the amount of time it takes to run all that verification and the ability to debug any issues uncovered during the run.

Performance is hampered first off by the sheer number of lines of VIP code to be run, which Synopsys puts at over 3 million. But making things worse is the fact that the various IP blocks may have verification models that use different languages or base classes, and therefore have to be stitched into the design with wrappers or gaskets. And those can kill performance.

From a debug standpoint, even though we have higher design abstraction, most debug tools operate at a low level so that all of that abstraction is lost.

Synopsys is addressing this with a couple major releases. First is what they call their Discovery VIP platform. The idea is that, with a new underlying architecture and all-SystemVerilog approach, all of the pieces can be stitched together without the need for any intervening adaptation bits. They support the three main verification methodologies, VMM, UVM, and OVM; compile-time switches let you choose which base classes to compile in.

They claim that they get a 4x verification performance benefit from this.

From a debug standpoint, they’ve also announced Protocol Analyzer, a high-level simulation results viewer that takes a verbose simulation log and presents the results in a manner that reflect the context and semantics of a specific piece of IP. So rather than just seeing network traffic as bits, for example, you can see them as packets and even track independent flows. They’ve announced that their tool will work with SpringSoft’s Verdi debugger as well.

You can find more details in the Discovery VIP and the SpringSoft Verdi collaboration releases…

Leave a Reply

featured blogs
May 16, 2021
https://youtu.be/_wup2MSTVks Made on Communication Hill, San Jose (camera Carey Guo) Monday: Intel eASIC: Linley and DARPA Tuesday: Please Excuse the Mesh: CFD and Pointwise Wednesday: Linley:... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
May 13, 2021
Samtec will attend the PCI-SIG Virtual Developers Conference on Tuesday, May 25th through Wednesday, May 26th, 2021. This is a free event for the 800+ member companies that develop and bring to market new products utilizing PCI Express technology. Attendee Registration is sti...
May 13, 2021
Our new IC design tool, PrimeSim Continuum, enables the next generation of hyper-convergent IC designs. Learn more from eeNews, Electronic Design & EE Times. The post Synopsys Makes Headlines with PrimeSim Continuum, an Innovative Circuit Simulation Solution appeared fi...
May 13, 2021
By Calibre Design Staff Prior to the availability of extreme ultraviolet (EUV) lithography, multi-patterning provided… The post A SAMPle of what you need to know about SAMP technology appeared first on Design with Calibre....

featured video

Industry’s First USB4 Silicon Success

Sponsored by Synopsys

USB4 offers up to 40Gbps speeds for incredibly fast connections. Join Synopsys to see the first demonstration of USB4 IP in silicon, along with real TX eyes for DesignWare USB4, DisplayPort, and USB 3.x IP.

Click here for more information about DesignWare USB4 IP

featured paper

Bring a "Can-Do" Attitude to Your Industrial Drone Design

Sponsored by Maxim Integrated

Providing predictable and error-free communications, CAN bus networks have been the workhorse of the automobile industry for over thirty years. But they have recently found a new lease on life in other industrial applications, including drones. This design solution shows where and how CAN transceivers can be used in drone designs and explains why it is important that they come with high levels of electrical protection.

Click to read more

featured chalk talk

TI Robotics System Learning Kit

Sponsored by Mouser Electronics and Texas Instruments

Robotics projects can get complicated quickly, and finding a set of components, controllers, networking, and software that plays nicely together is a real headache. In this episode of Chalk Talk, Amelia Dalton chats with Mark Easley of Texas Instruments about the TI-RSLK Robotics Kit, which will get you up and running on your next robotics project in no time.

Click here for more information about the Texas Instruments TIRSLK-EVM Robotics System Lab Kit