With higher-frequency (GHz) signals becoming more prevalent on trusty old-school FR-4 boards, it’s become increasingly important to test the quality of the lines – specifically, their insertion loss (SDD21) – as a PCB manufacturing step. The problem is that you have to probe both ends of a trace in order to do this. Not so hard in the lab, but high-volume testers aren’t really built for that – they want to probe in one place.

Two years ago at DesignCon, Intel proposed a new method of determining the insertion loss by taking time-domain measurements at only two points, both at the same end of the line. They called it “Single-Ended TDR to Differential Insertion Loss,” or SET2DIL.

A quick terminology note here: there seems to be inconsistency in the industry about what those test points are called. Some refer to them as two “terminals,” which equate to one “port.” Rhode and Schwartz (and perhaps other) seem to equate “terminal” and “port,” so the kinds of systems we’re talking about here are all four-terminal systems, but may be two-port or four-port systems, depending on your definition of “port.” So the problem being solved here is the ability to test the four-terminal system by measuring only two terminals. And, critically, both of those terminals are at the same end of the two traces that make up the differential pair.

At this year’s DesignCon, SET2DIL appears to be showing up, at least in software form. Rhode and Schwarz was demonstrating, among other things, that their vector network analyzer (VNA) could make the time domain (reflectometry or transmissometry) measurements and then drive them into a computer that ran the SET2DIL algorithm to calculate the differential insertion loss. They say that they’re working to integrate the algorithm into the VNA itself.

Polar Instruments also appears to be supporting SET2DIL in software as of their 2012 Atlas release.

More information on Rhode and Schwarz’s solution can be found in their release.