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Establishing 3D IC Standards – Or Not

For those of you watching 3D IC advancements, there’s a discussion you might want to come join next week at DesignCon in Santa Clara. Bill Bayer and Sumit DasGupta of Si2 have assembled a panel from Qualcomm, Sematech, Si2, and Xilinx, plus Jim Hogan, to discuss what, if anything, needs to be standardized in the 3D IC world in order to help it build a head of steam.

Standards cut both ways. Done well, they reduce chaos and help provide some direction for market participants. This makes folks less cautious about adopting and driving the technology. Too many standards, or the wrong ones, however, and you block the opportunity to do something better because you’ve locked in an old idea as a standard.

And it’s not always easy to find your way through the maze of things that could be standardized, especially once a standards body gets ahold of it. I remember years ago at JEDEC trying to set I/O standards. This was important so that different chips could talk to each other. But those I/O standards are on the datasheet – and the committee just couldn’t stop there and had to start standardizing practically the whole dang datasheet, even though interchange was no longer the issue (and no one had complained about the rest of the datasheet).

Anyway, here’s your opportunity to weigh in. I’ll be seeding the discussion with questions on the off chance that these guys need any prodding. And we’ll also be encouraging audience questions, so come make yourselves heard. We’re on at 3:45 on January 31st. Hope to see you.

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