editor's blog
Subscribe Now

A Clean, Well-Lighted Place for Models

Software is becoming an increasingly important element in SoCs as embedded systems are integrated into single chips. Such a chip must ship with working software, and, if it includes a platform that will run an OS and drivers and software written by the user, then even more testing is needed to prevent nasty surprises or let-downs.

This sort of testing starts at the architectural planning phase and continues down through the exercising of software on the detailed design. Initially, and for short bits of code, it can be done on a virtual platform – a model of the processing platform executing on a host computer. For longer runs of code (even simply booting Linux) that run on the actual design, an emulator is typically needed in order to get things done in a reasonable time.

In a virtual platform, at the architectural level, the models are typically SystemC. In an emulator, they will likely be the actual design (or have components of the actual design). In both cases, communication happens at the transaction level using TLM 2.0 – between models or, in an emulation scenario, between the emulator and the host.

This means that there’s a growing need for models and transactors. While they’re available today, Synopsys and others have decided that they’re too scattered, and that there is a need for a single place to go and look for (or request) models.

So they’ve created TLMCentral, an open portal for models and transactors. While Synopsys is providing the infrastructure, it is claimed to be open to anyone (including Synopsys competitors). Synopsys will participate as a model provider based on their IP business.

They’ve created the site as a general place to go not only for models, but for information and news as well. They have a forum, a blog, and a news feed.

The site is now live at www.tlmcentral.com.

More info on the press release

Leave a Reply

featured blogs
Aug 13, 2020
My first computer put out a crazy 33 MHz of processing power from the 486 CPU. That was on “Turbo Mode” of course, and when it was turned off we were left with 16 MHz. Insert frowny face. Maybe you are too young to remember a turbo button, but if you aren’t ...
Aug 13, 2020
Hi readers! Welcome to Veri-Fire, a blog series that helps you deep dive into Virtuoso® ADE Verifier and learn about its various whys and hows. In this series, Walter Hartong, a Product... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Aug 13, 2020
Imagine ambling into a small town, heading to the nearest public house to blow the froth off a few cold beers, and hearing your AI whisper '€œ...'€...
Aug 7, 2020
[From the last episode: We looked at activation and what they'€™re for.] We'€™ve talked about the structure of machine-learning (ML) models and much of the hardware and math needed to do ML work. But there are some practical considerations that mean we may not directly us...

Featured Video

Are You Listening?

Sponsored by Mouser Electronics

Inspiration doesn’t stick to a schedule. Luckily, creativity is a natural stimulant. Let Mouser Electronics help you on your way.

More information

Featured Paper

Computational Software: 4 Ways It is Transforming System Design & Hardware Design

Sponsored by BestTech Views

Cadence President Anirudh Devgan shares his detailed insights on Computational Software. Anirudh provides a clear definition of computational software, and four specific ways computational software is transforming system design & hardware design -- including highly distributed compute, reduced memory footprints, co-optimization, and machine learning applications.

Click here for the white paper.

Featured Chalk Talk

Mom, I Have a Digital Twin? Now You Tell Me?

Sponsored by Cadence Design Systems

Today, one engineer’s “system” is another engineer’s “component.” The complexity of system-level design has skyrocketed with the new wave of intelligent systems. In this world, optimizing electronic system designs requires digital twins, shifting left, virtual platforms, and emulation to sort everything out. In this episode of Chalk Talk, Amelia Dalton chats with Frank Schirrmeister of Cadence Design Systems about system-level optimization.

Click here for more information