editor's blog
Subscribe Now

HLS from Scratch

On the heels of the announcement of an entirely new analog design tool suite comes something else surprising. And I can’t quite figure it out.

I received an “announcement” of a new HLS (i.e., nominally, a C-to-VHDL) tool called HercuLeS. Except that the announcement didn’t read like a commercial launch: it read more like a note to friends and colleagues. It was written by Nikolaos Kavvadian, who describes himself in his email signature as “Lecturer, Research scientist, Hardware developer, Ph.D., M.Sc., B.Sc.”

I followed up with him to clarify whether this was a research effort or a commercial launch. He confirmed that this was developed separately from his academic work, and that it is a commercial, not an academic, venture. But apparently it’s not really commercialized yet: you can get to it online, but there’s a web interface that’s going to be released in October. At that point, the tool will still be available for free for limited programs; the pricing for full-on use hasn’t been set yet.

He doesn’t view HercuLeS competing specifically with the usual EDA suspects (which is mostly Catapult C, since Cadence and Synopsys deal with SystemC, not ANSI C). He sees some niche markets that they’ll be focusing on in Q4, including select supercomputing applications and the FPGA+µP (Altera/Intel, Xilinx/ARM) space.

I asked about quality of results (QoR): it’s relatively straightforward to come up with a model for converting software to hardware; the hard part is doing that efficiently, and the incumbents have years of accumulated QoR improvements under their belts. This sets a really high bar for newcomers to be taken seriously. Dr. Kavvadian acknowledged the importance of QoR, asserting that one main contributor to QoR is the intermediate representation (IR) used.

And this seems to be a key to this technology: it’s focused on GIMPLE, a Gnu set of IRs that have front ends to various languages, and NAC, a low-level language they have defined. The language (ANSI C in this case) is mapped to GIMPLE, and they then map that to NAC. NAC can be extended to provide improved mappings to hardware as experience builds. He sees this, along with optimized implementation of black boxes and their model of computation, as the crucial element.

The IR also unlocks something else they have their eye on: possible support of Python and Go or other languages that can be mapped to GIMPLE. Such users are another possible niche market for them.

All in all, I’m not quite sure what to make of this. It’s clearly very engineering driven, and the “launch” lacks many of the standard business trappings – which may not be a bad thing. Just a confusing thing. The business model – or at least the pricing – still aren’t set, so it’s almost like we’re watching this evolve.

We’ll keep an eye to see what happens. Meanwhile you can check here for more information.

Leave a Reply

featured blogs
Mar 20, 2023
Learn how to design security into high-bandwidth DDR memory interfaces and protect DRAM devices & data from memory-scraping attacks like Rowhammer & RAMbleed. The post Secure DDR DRAM Against Rowhammer, RAMBleed, and Cold-Boot Attacks appeared first on New Horizons...
Mar 20, 2023
Electronic design has evolved over the years to provide methods for optimizing power, space, and energy needs for the most demanding market applications in areas including hyperscale computing, consumer, 5G communications, automotive, mobile, aerospace, industrial, and health...
Mar 10, 2023
A proven guide to enable project managers to successfully take over ongoing projects and get the work done!...

featured video

First CXL 2.0 IP Interoperability Demo with Compliance Tests

Sponsored by Synopsys

In this video, Sr. R&D Engineer Rehan Iqbal, will guide you through Synopsys CXL IP passing compliance tests and demonstrating our seamless interoperability with Teladyne LeCroy Z516 Exerciser. This first-of-its-kind interoperability demo is a testament to Synopsys' commitment to delivering reliable IP solutions.

Learn more about Synopsys CXL here

featured chalk talk

Clamping Down on Failure: Protecting 24 V Digital Outputs
Sponsored by Mouser Electronics and Skyworks
If you're designing IEC61131 compliant digital outputs for these PLCs or industrial controllers, you need to have a plan to protect these outputs from a variety of unknowns. In this episode of Chalk Talk, Amelia Dalton chats with Asa Kirby from Skyworks about an innovative new isolated smart switch device from Skyworks that gives you an unprecedented level of channel flexibility and protection, letting you offer customers a truly “set it and forget it” solution when it comes to your next PLC design.
Apr 13, 2022
40,897 views