editor's blog
Subscribe Now

A New Spin on Logic

Way back in 2008, we took a look at MRAM technology. As a brief review, you may recall that Crocus in particular takes advantage of tunneling magneto-resistance between two magnetic layers. The bottom layer is fixed, or “pinned” and acts as a reference layer. The top one – also referred to as the “free” or “storage” layer – can have its magnetic polarity (or, more accurately, moment) reversed. Selectivity can be improved by engineering the materials so that a current during the write operation will heat the cell and lower the “coercivity” of the material – meaning that you switch that storage layer’s cell without disturbing any other cell. Crocus refers to this as thermally-assisted switching.

With that background (and recommending you to the original article for the details), Crocus has announced what they call a “magnetic logic unit” (MLU). They claim this capability lets them implement a NOR memory architecture, a NAND architecture, or an XOR cell.

They’re still being a bit cautious about the details of how this works, but Crocus’s Barry Hoberman took me though the XOR scenario. Before we can go all the way there, we should take one intermediate step by changing how a cell is read.

Originally, we had a pinned reference layer, and we read the cell by measuring the resistance through the cell. Relatively lower resistance means both layers magnetized alike (or in “alignment”); higher resistance meaning they’re magnetized oppositely (or in “anti-alignment”). So the first step we’re going to take is to remove the pinning. Now the reference layer – also called the “sense” layer, since it helps sense the state of the cell – is magnetically “floating”. Then add some metal lines so that you can magnetize the sense layer as north or south. (To pick arbitrary names for two magnetic states).

To read the cell, first set the sense layer to north and do a resistance read; then, very quickly, switch the sense layer to south and do another read. This is a differential-mode read; whichever resistance is higher establishes the polarity of the storage node.

But here’s where the XOR characteristic comes in: you can ignore the specific northness or southness of the fields. If the two layers – sense and storage – have the same polarity (regardless of what it is), they will run lower resistance; if they have opposite polarity, they’ll have higher resistance. That’s the very definition of the exclusive-OR function (assuming low resistance means 1).

Exactly where all of this will lead product-wise isn’t clear yet. They discuss a number of applications of the NAND and XOR capability, but right now it’s just a technology story. Presumably, staying tuned will give us the rest of the story at some point.

More details in Crocus’s release

Leave a Reply

featured blogs
Apr 6, 2020
My latest video blog is now available. This time I am looking at the use of dynamic memory in real-time embedded applications. You can see the video here or here: Future video blogs will continue to look at topics of interest to embedded software developers. Suggestions for t...
Apr 4, 2020
That metaphorical '€œboing'€ sound you hear, figuratively speaking, is a symbolical ball allegorically landing on Chewy'€™s side of the illusory net....
Apr 3, 2020
[From the last episode: We saw some of the mistakes that can cause programs to fail and to breach security and/or privacy.] We'€™ve seen how having more than one program or user resident as a '€œtenant'€ in a server in the cloud can create some challenges '€“ at leas...
Apr 2, 2020
There are many historical innovations that are the product of adversity, and the current situation is an extreme example.  While it is not the first time that humanity has faced a truly global challenge like the COVID-19 pandemic, this time the world is connected by tech...

Featured Video

LE Audio Over Bluetooth with DesignWare Bluetooth IP

Sponsored by Synopsys

The video shows the new LE Audio using Synopsys® DesignWare® Bluetooth 5.2 PHY IP and Link Layer IP with isochronous channels, and ARC® Data Fusion IP Subsystem with ARC EM9D Processor, running the LC3 codec supporting LE Audio.

Click here for more information about Bluetooth, Thread, Zigbee IP Solutions