editor's blog
Subscribe Now

A New Spin on Logic

Way back in 2008, we took a look at MRAM technology. As a brief review, you may recall that Crocus in particular takes advantage of tunneling magneto-resistance between two magnetic layers. The bottom layer is fixed, or “pinned” and acts as a reference layer. The top one – also referred to as the “free” or “storage” layer – can have its magnetic polarity (or, more accurately, moment) reversed. Selectivity can be improved by engineering the materials so that a current during the write operation will heat the cell and lower the “coercivity” of the material – meaning that you switch that storage layer’s cell without disturbing any other cell. Crocus refers to this as thermally-assisted switching.

With that background (and recommending you to the original article for the details), Crocus has announced what they call a “magnetic logic unit” (MLU). They claim this capability lets them implement a NOR memory architecture, a NAND architecture, or an XOR cell.

They’re still being a bit cautious about the details of how this works, but Crocus’s Barry Hoberman took me though the XOR scenario. Before we can go all the way there, we should take one intermediate step by changing how a cell is read.

Originally, we had a pinned reference layer, and we read the cell by measuring the resistance through the cell. Relatively lower resistance means both layers magnetized alike (or in “alignment”); higher resistance meaning they’re magnetized oppositely (or in “anti-alignment”). So the first step we’re going to take is to remove the pinning. Now the reference layer – also called the “sense” layer, since it helps sense the state of the cell – is magnetically “floating”. Then add some metal lines so that you can magnetize the sense layer as north or south. (To pick arbitrary names for two magnetic states).

To read the cell, first set the sense layer to north and do a resistance read; then, very quickly, switch the sense layer to south and do another read. This is a differential-mode read; whichever resistance is higher establishes the polarity of the storage node.

But here’s where the XOR characteristic comes in: you can ignore the specific northness or southness of the fields. If the two layers – sense and storage – have the same polarity (regardless of what it is), they will run lower resistance; if they have opposite polarity, they’ll have higher resistance. That’s the very definition of the exclusive-OR function (assuming low resistance means 1).

Exactly where all of this will lead product-wise isn’t clear yet. They discuss a number of applications of the NAND and XOR capability, but right now it’s just a technology story. Presumably, staying tuned will give us the rest of the story at some point.

More details in Crocus’s release

Leave a Reply

featured blogs
Jun 2, 2023
Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you'll find a community where employees share their perspectives and experiences. By providing a glimpse of their personal...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....
Jun 2, 2023
Explore the importance of big data analytics in the semiconductor manufacturing process, as chip designers pull insights from throughout the silicon lifecycle. The post Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics appeared first on New Hor...

featured video

Automate PCB P&R Tasks for Designs in Minutes

Sponsored by Cadence Design Systems

Discover how to get a dramatic reduction in design turnaround time by automating your placement, power plane generation, and critical net routing with Cadence® Allegro® X AI technology. Built on and accessed through the Allegro X Design Platform, Allegro X AI reduces P&R tasks from days to minutes with equivalent or higher quality compared with manually designed boards.

Click here for more information

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Designing with GaN? Ask the Right Questions about Reliability
As demands for high-performance and low-cost power conversion increases, gallium nitride offers several intriguing benefits for next generation power supply design. In this episode of Chalk Talk, Amelia Dalton and Sandeep Bahl from Texas Instruments investigate the what, why and how of gallium nitride power technology. They take a closer look at the component level and in-system reliability for TI’s gallium nitride power solutions and why GaN might just be the perfect solution for your next power supply design.
Oct 4, 2022