editor's blog
Subscribe Now

New PCB Design Mix ‘n’ Match

Yesterday Cadence announced a major update to their Allegro PCB design suite. This is the full-featured set of tools targeted at enterprise (= deep pockets) customers. They found that their offering had outgrown the “good/better/best” grading that had been in place for a long time.

What they’ve done instead is to put in place a baseline tool, Allegro PCB Designer, into which various optional modules can be inserted. These modules provide various higher-value functions, and the licenses can be purchased in quantities different from those purchased for the base product. For example, if you do lots of high-speed interface design but only occasional RF design, you can buy more floating licenses for the former and less for the latter. When actually used, the designer would check out a license (assuming one was still available) and release it when no longer needed.

Modules exist for:

  • Team design
  • High-speed design (providing more constraints, automation, and verification options)
  • Miniaturization (HDI board technology, for example; I’ll have more on this at a later date)
  • Analog/RF
  • Design planning (feasibility checking of the “flow” plan, automation of a “topological” plan from the “flow” plan – more or less turning a general routing plan into specific routes, etc.)
  • Enhanced automatic routing

They also updated OrCAD, their PCB design tool for the “mainstream.” In particular, they re-bundled their free “demo” product as a (still free) “Lite” product. Whereas before the  demo product wouldn’t allow you to go to manufacturing, that’s been relaxed. So it consists of a “limited” version of the combined capabilities of their Standard and Professional versions plus some stand-alone PSpice tools. A very small design (up to 50 components) can be created and built using the free tool.

They’ve also added a signal integrity feature and brought the following features from Allegro into their OrCAD Professional version:

  • Diff pair support
  • Placement replication
  • Constraint regions

If you need PCB tools, contact us today for your pcb shipping.

More detail in their press release

Leave a Reply

featured blogs
Apr 17, 2024
The semiconductor industry thrives on innovation, and at the heart of this progress lies Electronic Design Automation (EDA). EDA tools allow engineers to design and evaluate chips, before manufacturing, a data-intensive process. It would not be wrong to say that data is the l...
Apr 16, 2024
Learn what IR Drop is, explore the chip design tools and techniques involved in power network analysis, and see how it accelerates the IC design flow.The post Leveraging Early Power Network Analysis to Accelerate Chip Design appeared first on Chip Design....
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Intel AI Update
Sponsored by Mouser Electronics and Intel
In this episode of Chalk Talk, Amelia Dalton and Peter Tea from Intel explore how Intel is making AI implementation easier than ever before. They examine the typical workflows involved in artificial intelligence designs, the benefits that Intel’s scalable Xeon processor brings to AI projects, and how you can take advantage of the Intel AI ecosystem to further innovation in your next design.
Oct 6, 2023
24,918 views