SEGGER’s TCP/IP stack now offers support for the Tail Tagging feature of Micrel/Microchip Ethernet switches. embOS/IP is the first embedded IP stack to support Tail Tagging.

This enhancement establishes multiple virtual Ethernet ports when only one physical Ethernet port is available on the CPU – by choosing another PHY.

Offering more than one Ethernet port is normally complex, difficult to handle, and most CPUs only have a single port Ethernet controller. It thus requires additional components such as external Ethernet controllers to extend the number of available ports.

Micrel/Microchip has developed switches which are able to expand one Ethernet port of the CPU into 1+n fully independent ports for the network by using the so-called Tail Tagging mode.

Several ports might, for example, be needed when building a router where every port has to be addressed individually. Additionally, multiple ports can be used to create redundant networks, known as multihoming.

Port addressing is done on a pure software basis and is transparent to the outside. The new feature allows every port to have its own assigned MAC-address so that they appear like different physical hosts in a network.

Additionally, SEGGER is offering hardware to evaluate the feature. embOS/IP Switch Board is now available, including an NXP Kinetis K66 CPU, Micrel/Microchip switch PHY KSZ8794CNX with three usable Ethernet ports and an on-board version of SEGGER’s popular J-Link debug probe.

Tail Tagging support, together with a PHY driver, is available as an add-on. The package can be easily evaluated using SEGGER Embedded Studio, even while  in evaluation mode.

More information on Tail Tagging support can be found at https://www.segger.com/embos-ip-tail-tagging.html.

The embOS/IP Switch Board is described in detail here: https://www.segger.com/embos-ip-switch-board.html

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